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Technology Stocks : Intel Corporation (INTC)

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To: Tony Viola who wrote (82186)	5/30/1999 11:17:00 PM
From: kash johal	Read Replies (2) of 186894

Tony, Re: "I also thought the data signals were "only" 400 MHz, where data is contained on both edges to get the 800 megabits per second per line. I asked that of Tenchusatsu once and I believe he said this is true. Where is that guy lately. Geez, he can't even take a couple days off from this and people all over the place are looking for him." That may well be. Paul also tells me that Coppermine doesn't include the RDRAM controller on chip. So worst case Coppermine can run with SDRAM. In addition there are plenty of chip set vendors that Intel could license as a short term need for 133 SDRAM. (Would be kind of funny if they went with Via!!!). Having said that even 400Mhz data buses are non-trivial. I am sure Intel has worked out the engineering specs etc. However the board manufacturing is Much more complex and expensive. Remember Intel went to a slot architecture when they wanted to run the L2 cache at 1/2 clock speeds or 180-200mhz. So 400Mhz is non trivial to say the least. Frankly, just the way DIMMS and RIMMS are plugged into the sockets is non ideal. In the best case they would be mounted directly on the MB from a prefromance standpoint. Regards, Kash

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