KK,
Trying to move the world to Rambus is becoming an expensive exercise for Intel.
This whole memory exercise, i.e., DRDRAM and chipsets design and debug, DRDRAM yield ramp (hopefully), performance of DRDRAM vs. SDRAM systems, etc., should turn out to be quite a learning experience for a few companies, including Intel. It'll be an expensive one also, as you point out. Fortunately, worst case outcome won't break Intel. Sounds like they have 100 MHz SDRAM interface protocol, at least, up their sleeve as a contingency.
Anyone have a rule of thumb for how much difference main memory makes in performance, anyway, what with caches getting bigger and faster all the time? I thought main memory had been pushed well into the background as a serious performance factor.
Tony |
