Gary - RE: "I believe the L2 cache would be 1/2(or 1/3) of the CPU clock. What about the memory ? Is it going to be 200Mhz ? If that is the case, where do one get such high speed DRAM ? Or may be I missed read the 200Mhz claim ?"
Hopefully this will answer all the questions -
""The Alpha EV6 Bus Protocol, capable of bus speeds from 40 to 400 mhz, uses a Point-to-Point Topology with Clock Forwarding". Huh? Am I the only simple guy who doesn't understand this technical mumbo jumbo? AMD promises a 200 mhz bus for the K7, so will we need 200 MHz SDRAM? Rambus modules? DDRAM (Double Rate SDRAM)? Will we have to throw away our new 100 MHz SDRAM? Some people say AMD will not be able to use a 200 mhz bus for the K7 because 200 mhz capable RAM will be much too expensive. Enough confusion! Let's get to the bottom of this.
Take a look at the how the K7 works together with its chipset.
You see that the EV6-bus is NOT the bus connected to the memory. The EV6 bus is the big fat pipe from the CPU to the chipset. The chipset has different pipes to all the other buses, including main memory, PCI, and AGP. In a Slot 1 system, the same local I/O bus must handle the I/O requests of the CPU, main memory, AGP, and PCI bus. The K7, however, will have its own private pipe to the chipset.
So it really does not matter what RAM will be available, AMD can use the 200 MHz EV6-bus. What RAM can be used depends on the chipset. When the first K7 for the retail market are shipped, you will plug cheap 100 or 133 MHz SDRAMs in your K7-motherboard and you will get a K7 with a 200 MHz EV6 bus. On top of that, don't forget that the K7 has a still a 512 KB backside L2-cache. 90 to 95 percent of the time, the K7 will look in the L2-cache for the data that is needed. So, regardless of whether you use DIMM modules running at 133 MHz or 200 MHz, the performance impact will be minimal. The notable exception to this, however, is AGP."
aceshardware.com
That article and its follow-up explain quite a bit about the K7. |
