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Politics : Formerly About Advanced Micro Devices
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To: Cirruslvr who wrote (60425)6/3/1999 8:18:00 PM
From: Elmer  Read Replies (2) of 1571401
 
Re: "All right, professor. Teach me... First of all, if AGP doesn't sit on the front side bus, does have its own connection to the chipset?

Secondly, how is the AGP data transfered? Over its own data path? Or does AGP data not need to go to the chipset, and it can access RAM directly?"

Thanks for the promotion but I'm just an Engineer.

Think of the chipset as a square box. On the top or "North Bridge" is the processor bus or port in the case of the K7. This connects directly to the chipset at currently 100MHz. Visualize on the left, the AGP port which has it's own direct private connection to the chipset at 66/133MHz. On the right is the memory and it's own connection to the chipset at 100MHz. On the bottom or "South Bridge" is the PCI bus and it's own connection to the chipset at 33MHz.

Transactions from/to the processor and memory do not involve the AGP port or the PCI bus.

Transactions from/to AGP and memory do not involve the processor bus/port or PCI bus.

Transactions from/to PCI and memory do not involve the Processor bus/port or AGP.

All interfaces are independent and arbitration takes care of conflicts. In theory, the processor could be talking to the PCI bus at the same time AGP is talking to memory. Or some other combination.

With AGP in 2X mode, whoever is supplying the data also supplies the clock. This is called "source synchronous" and addresses clock/data skew problems. I speculated that Socket7 would likely need a similar solution to hit 133MHz however I do not know this for a fact.

Hope this helps.

EP
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