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Politics : Formerly About Advanced Micro Devices
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To: Elmer who wrote (60426)6/3/1999 9:26:00 PM
From: kash johal  Read Replies (2) of 1571308
 
Elmer,

Re:" Thanks for the promotion but I'm just an Engineer.

Think of the chipset as a square box. On the top or "North Bridge" is the processor bus or port in the case of the K7. This connects directly to the chipset at currently 100MHz. Visualize on the left, the AGP port which has it's own direct private connection to the chipset at 66/133MHz. On the right is the memory and it's own connection to the chipset at 100MHz. On the bottom or "South Bridge" is the PCI bus and it's own connection to the chipset at 33MHz.

Transactions from/to the processor and memory do not involve the AGP port or the PCI bus.

Transactions from/to AGP and memory do not involve the processor bus/port or PCI bus.

Transactions from/to PCI and memory do not involve the Processor bus/port or AGP.

All interfaces are independent and arbitration takes care of conflicts. In theory, the processor could be talking to the PCI bus at the same time AGP is talking to memory. Or some other combination."

You should take any promotion you get!!!

OK you have explained that these buses are seperate but this still does not adress the bandwidth issue.

The argument goes that it is desirable to have a faster memory bus. And as AGP 4x comes on the needs for AGP to transfer to memory increase to where it can overwelm the current 100Mhz bus. Therefore if you have a faster bus it can handle better the needs of the processor and the AGP 4x.

The memory does interface to AGP and the processor bus wether it is seprate ports (as you have clarified) or as a muxed bus is to an extent irrelevant wrt memory bandwidth.

The real question is are real world apps requiring more memory bandwidth - the answer seems apparently not with winstone. However in apps where it does use the memory bus such as speech recognition there was a significant improvement with faster memory.

Now if AGP 4x starts hogging the memory a whole bunch more with the newer graphics cards ( as alleged) this could explain the argument for faster memory bus.

BTW folks are also going to PCI X later this year as well so the total memory bandwidth required will perhaps increase then as well.

Hopefully you follow what I am saying.

Regards,

Kash
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