Paul, article...Moore's Law Will Continue to Drive Computing...
June 9, 1999
PC Magazine: Computing power has increased at an amazing--and amazingly consistent--pace. New technologies promise more of the same in the future
By Nick Stam
In 1965, Intel Corp. cofounder Gordon Moore predicted that the density of transistors in an integrated circuit would double every year. His observation, dubbed Moore's Law, was later changed to every 18 months. Moore's Law has proven remarkably accurate for over three decades. Not only transistor density but also microprocessor performance tends to follow Moore's Law.
Andy Grove, former Intel CEO and chairman, predicted at Fall Comdex 1996 that by the year 2011, Intel will ship a microprocessor with 1 billion transistors, operating at 10 GHz, using a 0.07-micron semiconductor process technology able to calculate 100 billion operations per second.
Microprocessor Report's founder and executive editor, Michael Slater, thinks that in the future, doubling transistor count may require more than 18 months when moving from one major chip design or fabrication technology to the next. This is due both to chip logic's becoming more complicated (requiring longer design and validation time frames) and to increasingly difficult hurdles in chip fabrication technology.
Fabrication Improvements
Fabrication technology must improve in many areas with each successive process generation, such as the move from 0.25-micron design to 0.18. One particularly critical process is photolithography, where short-wavelength light sources are focused with a number of precision lenses and shone through small transparent masks containing circuit details. This exposes the photoresist on a wafer's surface, which is chemically removed leaving microscopic details of the circuit pattern on the wafer.
According to Mark Bohr, who is Intel's director of process architecture and integration technology and an Intel Fellow, light sources and optics must evolve in concert. Later this year, Intel will ship 0.18-micron Pentium III chips using the same 248-nm wavelength deep-UV light source as used in current 0.25-micron Pentium II and Pentium III chips. But when moving to 0.13-micron processes three or four years from now, expect to see 193-nm wavelengths using excimer lasers as the light source.
Beyond 0.13- could be a 0.09-micron process, which would use 157-nm wavelength excimer lasers, according to Bohr. And the next step below 0.09 is a big one in terms of technology and manufacturing processes: the 0.07-micron process in Grove's processor of 2011. This level of photolithography will likely require extreme-UV (EUV) light sources. EUV has a wavelength of only 13nm, which has long-term potential for etching far smaller transistors but is confounded by the fact that there are no known transparent mask materials that will allow such short wavelengths to pass through. This requires entirely new reflective lithography processes and optics to be implemented coincident with EUV.
As you continue to increase the number of transistors over time, transistor interconnect wires get smaller and closer together, increasing resistance and capacitance while adding to circuit delays. To reduce resistance and shrink interconnect line widths at the smaller dimensions, copper will displace aluminum as the interconnect metal of choice, as seen in the new IBM PowerPC G3 chips. AMD's CTO, Atiq Raza, predicts AMD's new chips will be in copper by the second quarter of 1999. Bohr expects that future Intel CPUs in the 0.13-micron process and beyond will use copper interconnects.
Physical Limits
Power and heat management could pose huge problems in the future. As transistors continue to shrink, their gate oxides become only a few molecules thick in order to maintain required transistor switching speeds, and low voltages will be necessary to maintain their structural integrity. Intel has stated that chips ten years from now will operate at less than 1 volt and could easily consume 40 to 50 watts of power, which implies 50-amp currents or larger. Evenly distributing such huge amounts of current within the chip and dissipating the tremendous amount of heat generated are both subjects of much research.
Will current silicon fabrication methods hit physical limits by the year 2017 (as many have predicted), meaning that we'll reach a point where we just won't be able to build usable transistors any smaller? It's difficult to look that far ahead, but research into areas such as molecular nanotechnology, optical or photonic computing, quantum computing, DNA computing, chaotic computing, and other seemingly esoteric areas of research may prove to be fruitful, changing totally the way we design and manufacture microprocessors or perform computations.
Not only will fabrication technologies undergo huge changes in the coming years, but so will microprocessor architectures, including in their logic designs, instruction sets, registr sets, external interfaces, and on-board memory sizes. According to John Hennessy, dean of Stanford University's School of Engineering and cofounder of MIPS Computer Systems, we are in the later stages of the quest for more instruction-level parallelism (ILP), particularly with the x 86 instruction set, though we still do expect to see more complex 32-bit x 86 processors from AMD, Cyrix, Intel, and others in the coming years.
There are plenty of creative microarchitectural techniques available to enhance 32-bit x 86 designs for many years to come, according to Fred Pollack, director of Intel's Microcomputer Research Lab and an Intel Fellow. But Pollack also stated that reaching substantially higher levels of performance require totally new methods.
To move to the next generation, Intel and HP introduced their EPIC (Explicitly Parallel Instruction Computing) instruction set technology, which is a radical departure from x 86, in October 1997. Their 64-bit IA-64 architecture is the first instruction set to incorporate EPIC principles, and their upcoming Merced processor is the first IA-64 implementation. Pollack says Intel will initially target IA-64 at workstation and server segments and future high-end 32-bit x86 chips at professionals and power users. Raza and Pollack think 64-bit processing will be mainstream in ten years, but they are hesitant to forecast 64-bit processors on all our desktops in five years.
An incredibly important objective, according to AMD's Raza is to get as much fast memory as close to the processor as possible and to reduce latencies to I/O devices. Raza claims we must design future CPU chips with far faster and more direct interactions with main memory, graphics, and especially lower bandwidth streaming devices. We'll also see a trend toward PC-on-a-chip designs.
Chip Multiprocessors (CMPs) include multiple processor cores on a single chip and are expected to proliferate during the next decade. We'll need to see more multithreaded applications and multitasking to take advantage of these architectures. In the long term, such multiprocessing designs may delay the need to shift to exotic computer designs, if we assume silicon technology really will hit the wall around 2017. But it will take time for CMPs and complex multithreaded applications to evolve in the mainstream markets, according to Hennessy. He believes the embedded-CPU market would be the first target for CMPs. Slater believes we'll see CMPs in workstations and servers, though memory bandwidth for the multiple cores on a chip could be a problem.
Expect much innovation for many years ahead in silicon fabrication and CPU architectures. You'll have a billion transistors on a chip by the year 2011--if not sooner--and your computing devices will be far more powerful than you can imagine.
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