Cultivating a new breed of network processors
Electronic Buyers' News - June 14, 1999
The proliferation of the Internet, e-commerce, voice-over-IP, and related industries is creating
fertile ground for the development of new network processors.
A recently adopted term for a class of communications-enabled CPUs developed by MIPS
Technologies Inc., Motorola Inc., and other companies as early as the late 1980s, the network
processor is basically a specialty chip designed to boost data-packet-processing functions in
high-end LAN/WAN equipment.
A handful of chip start-ups, including Agere, C-Port, Maker, MMC, SiTera, Softcom, and
T.sqware, are introducing new twists on the technology-programmable network processors
designed to offer a novel solution for the lingering bandwidth problem.
Also stirring up the market is the recent entrance of Intel Corp.
and Texas Instruments Inc. Others, including Alliance Semiconductor
Corp., IBM Microelectronics, LSI Logic Corp., Lucent Technologies
Inc.'s Microelectronics Group, and Vitesse Semiconductor Corp.,
expect to announce network processors this year, according to sources.
It's no wonder. The worldwide network-processor market is projected to grow to $300 million or
more by 2002, according to International Data Corp., Framingham, Mass.
"What's driving this business is the explosion of the Internet and intranets," said Mike Shoemake,
program manager at Motorola, Austin, Texas. "There's also a growing demand for high-speed
devices [such as network processors] that provide connectivity from the central office to a multitude
of telephone lines."
Indeed, the opportunities are mind-boggling for chip makers, OEMs, and carriers. Analysts
estimate that the Internet will grow from about 70 million users today to around 156 million by
2001.
Despite-and perhaps because of-the network-processor market's promise, consolidation is
inevitable.
With a dozen network-processor vendors competing in the market today, and several others
expected to arrive soon, not everyone will remain independent, according to Greg Sheppard, an
analyst at Dataquest Inc., San Jose. "About half the new network-processor companies will get
acquired by other chip makers," Sheppard said. "About a third will get acquired by an OEM, while
the other third will simply fail."
Last month, Camarillo, Calif.-based Vitesse acquired XaQti Corp., a Santa Clara, Calif.-based
developer of specialty packet-processing devices and high-end media-access controllers, for $65
million in stock.
Decisions, decisions
OEMs will also confront a range of complex choices. The first being, not all network processors
are alike.
Confusing matters further, the term "network processor" is loosely applied to an assortment of
products designed to deliver quality of service (QoS) over a WAN. Some network processors are
used for LAN-based applications, while others will drive WAN-based ATM, frame-relay, and
SONET protocols. And a few even claim to be all things to all designers.
But, in general, the new wave of network processors are specialized, programmable data-packet
chip engines designed for access concentrators, Layer 2/3/4 switches, routers, and related
equipment.
Network processors also prom- ise to accelerate the long-awaited convergence between the LAN
and WAN. In some cases, the chips enable a LAN-based system to support various WAN
protocols such as ATM, frame relay, Gigabit Ethernet, and packet-over-SONET on the edge or
core of a network.
More importantly, today's network processors could even replace, if not spell the death of, costly
ASICs that OEMs had developed for use in their own LAN/WAN equipment, according to
Sheppard.
The devices, which OEMs develop in-house to offload data-intensive tasks from the host CPU in a
high-end LAN/WAN system, perform the fast-data-path and forward-packet-processing functions
in a system. The parts are also used to handle a system's data-security functions, such as filtering,
firewall, and policy enforcement.
"The problem with [OEMs building their own] ASICs is not performance, but cost and
development times," Sheppard said.
Replacing these captive devices with less-expensive network pro- cessors from merchant suppliers
should enable OEMs to reduce their costs and get products to market more rapidly, according to
Wade Appelman, vice president of marketing at SiTera Corp., a network-processor start-up in
Longmont, Colo. "Today, it takes an OEM about 18 months to develop and ship a new product,
simply because of the long development cycles with in-house ASICs," Appelman said.
But according to some vendors, network processors could even replace the system's host CPU.
Traditionally, OEMs use various types of merchant RISC chips-Intel (i960 or Strong- ARM),
Hitachi Ltd. (SH), MIPS Technologies (Rx000), or Motorola (PowerPC)-as the host CPU in a
router and other LAN/WAN equipment.
In a router, for example, the host CPU handles the network-management functions and the routing
of data in the lookup address table in the system itself. But packet processing is typically done in
software, not hardware, thereby causing one of the biggest problems-latency.
Chip designers have proposed several methods to solve the latency, or delay, problems: faster host
CPUs, CAMs (contact-addressable memories), and network processors.
Some believe that traditional microprocessors available on the merchant market are running out of
gas in the network, but others insist they can keep up with current and future bandwidth
requirements.
In 1989, Motorola rolled out what could be considered the world's first network processor, a
68000-based CISC chip that provided a modest 6 mips of performance. Late last year, almost 10
years afterward, Motorola announced the PowerQuicc II, a 233-MHz chip with 280 mips of
performance. Based on a PowerPC RISC-chip core, Motorola's so-called
"integrated-communications controller" is designed for use as the host CPU in a LAN/WAN
system.
The PowerQuicc II also goes beyond a pure host CPU. The chip, which is sampling, also supports
multiple communication protocols such as ATM, Fast Ethernet, and 256 channels of 64-Kbit/s
HDLC in a system.
"Ultimately, we will develop 1-GHz or faster chips [to keep up with bandwidth requirements in the
future]," Shoemake said.
Other traditional RISC-chip vendors are addressing these requirements. "There will always be a
need for stand-alone CPUs [in a router and other LAN/WAN systems]," said Bob Nappa, strategic
marketing manager at Integrated Device Technology Inc., Santa Clara. IDT sells a line of
high-speed embedded processors built around MIPS' Rx000 RISC architecture, which are
designed for routers and other products.
"We're constantly integrating our chips' larger cache sizes and better out-of-order algorithms in
order to speed up networking equipment," Nappa said.
"In the near future, you will also see our processors running at 500 to 600 MHz or faster," he
added.
Still others are using CAMs to attack the latency issues. NetLogic Microsystems Inc. has moved to
leverage its CAM technology into a new market, recently announcing a line of Classless
Inter-Domain Routing processors and modules. CIDR refers to a methodology of processing data
packets in the current generation of the Internet, dubbed IPv4 (Internet Protocol version 4).
CIDR processors are not pure network-processor devices, but rather souped-up CAMs that can
boost lookup-table functions in a router at a sustained rate of 66 million searches per second,
according to T.J. Mueller, vice president of marketing at NetLogic, Mountain View, Calif.
In fact, CIDRs work in conjunction with network processors from various suppliers to boost
network speeds. "CIDRs enable the system to make a best-match search [at faster rates than
traditional CAMs]," he said.
Other CAM suppliers, including Kawasaki LSI and Music, have
products for similar applications.
A different take
The network-processor start-ups have their own view of the world. Basically, the chip can handle
data-packet and multi-protocol functions in hardware, not software, leaving the host CPU to
execute the simple, non-critical management tasks, said Michel Desbard, chairman and chief
executive of T.sqware Inc., Santa Clara.
"At one time, the host CPU had enough power to meet bandwidth requirements," Desbard said.
"But today, [the host CPU] doesn't have sufficient power to meet current and future bandwidth
requirements."
An early player in the market, T.sqware has been shipping a family of so-called Edge Processors
build around a SPARC RISC architecture, which is said to handle up to 350 mips of performance.
T.Sqware's T702, T703, and T704 are designed for use in ISDN equipment, digital-modem
servers, frame relays, and remote-access concentrators. "Our chips support frame relay to ATM
protocols," he said.
Other developers are designing their chips to eliminate the need for a separate host CPU. This is
reportedly the objective for C-Port Corp., which is readying its new products.
"We're building a general-purpose, fully programmable processor," said Clint Ramsay, vice
president of marketing at the North Andover, Mass.-based network-processor start-up.
"Our chip is optimized for networking [as opposed to today's merchant RISC chips]," he said.
"It's also designed to support a number of protocols, such as Gigabit Ethernet,
packet-over-SONET, and others."
While the debate between merchant RISC chips vs. the new network processors remains heated,
OEMs will also need to keep a close watch, if not a scorecard, on the dizzying array of vendor
announcements.
So far this year, the biggest flap in the network-processor fray has been Intel's entry. While some
analysts believe the company's move validated the concept of network processors, others say it
stirred up uncertainty in the market and concern among competitors.
Intel earlier this year announced plans to enter the network-processor market, but declined to
describe the architecture of its planned products.
Greg Lang, vice president and general manager of Intel's Network Infrastructure Division, hinted
that the company's devices would be programmable chips designed to support ATM, Gigabit
Ethernet, and other protocols.
Sources believe Intel's network processor will be based on a new version of its StrongARM
RISC-chip line. The products, which will range from 150 to 600 MHz, will ship some time next
year.
Stealing competitors' thunder
TI recently rolled out Digital Thunder, a communications-IC platform that combines a
high-performance DSP-based approach with a software and development initiative tailored for
various network services and applications. Digital Thunder melds TI's TMS320C6x DSP
architecture with a network-software framework, a development-and-debug environment, and a
network third-party program, said Gary Reichmuth, marketing manager for TI's Digital Thunder
program in Dallas.
Competitors are watching Intel and TI, but aren't about to give the network-processor market
away. The mostly small and midsize companies are revising their strategies to keep ahead.
"Our [technology] has been focused on the LAN side of the business, but the growth is in the
WAN," said Douglas Spreng, president and chief executive of Sunnyvale, Calif.-based MMC
Networks Inc., one of the first and largest suppliers of network processors. "We may refocus more
of our efforts in the WAN in the future."
MMC's AnyFlow 5000 is designed for Layer 2/3/4 switching applications in ATM and
Ethernet-based networks.
Others are moving toward the WAN. Maker Communications Inc. recently introduced a
network-processor line that supports ATM and packet-over-SONET applications. Previously,
Maker's chips only supported ATM.
"ATM is the established technology for WANs, but packet-over-SONET is also rapidly growing,"
said Thomas Medrek, vice president of marketing at Maker, Framingham, Mass.
The company's MXT4400 Traffic Stream Processor is a uni-processor based on a 125-MHz,
32-bit RISC chip core. Dubbed Octave, the device resides in the data path of networking systems
and provides wire-speed traffic-management functions at transmission speeds ranging from DS-3
to OC-48. The chip sells for $120 to $170, depending on speed.
Maker also sells a software stack for the MXT4000. The new PortMaker AAL2 software,
optimized for the ATM Adaptation Layer 2 protocol, allows multiple voice channels to be carried
over an ATM network. PortMaker AAL2 operates as a SAR (segmentation and reassembly)
operation, allowing as many as 248 voice channels to be transported on a single ATM circuit.
Softcom Microsystems Inc. is taking a similar approach. Its new P3 processors support high-end
WAN protocols such as ATM, Gigabit Ethernet, and packet-over-SONET, according to Melinda Le
Baron, vice president of marketing at the Fremont, Calif., company.
Softcom also sells a board-level product built around the P3. Both products are for the
identification of packets requiring special handling, the provisioning of traffic, and the ability to
count the relevant statistics for packet classification.
Taking a less traditional approach to the problem, Agere Inc. recently debuted the Fast Pattern
Processor, a network-processor line designed to support multiprotocol data at speeds up to OC-48,
said Bob Bridge, vice president of marketing at the Austin company.
Offered in 60- and 100-MHz versions, Agere's chips include a pattern-recognition and
packet-classification technology that resembles a lookup table in a router. But the chips can process
data at wire speeds without the need for specialized CAMs, thereby providing a savings for OEMs.
Agere's chips also enable QoS packet prioritization, traffic engineering, and tunneling functions,
Bridge said.
The 60-MHz chip, which supports OC-12, is priced at $200 in 100s. The 100-MHz version, which
supports OC-48, Gigabit Ethernet, and other protocols, is $500.
Although C-Port and SiTera have not formally rolled out their respective network-processor lines,
sources believe the companies are readying some ambitious architectures. C-Port reportedly plans
to combine a multiple embedded-processor core with a parallel-processing chip built around MIPS'
Rx000 RISC technology.
Other network processors are expected to be announced this year, but all vendors will face the same
challenge.
"Every month, the traffic doubles on the backbone," IDT's Nappa said. "This is putting more and
more pressure on the router to push more packets per second."
Copyright ® 1999 CMP Media Inc.
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