Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Politics : Formerly About Applied Materials -- Ignore unavailable to you. Want to Upgrade?

To: Sun Tzu who wrote (31059)	6/16/1999 6:26:00 PM
From: Tony Viola	Respond to of 70976

Sun, OT, microcode. Intel's MPU's and IBM's mainframes use a good deal of microcode in place of hard wired control logic. I can vouch for those two CPU families. Quick look at Intel site produced this: Built-in Self Test (BIST) provides single stuck-at fault coverage of the microcode and large logic arrays, as well as testing of the instruction cache, data cache, Translation Lookaside Buffers (TLBs), and ROMs. Use of microcode may not be as prevalent right now as in the 80's, but it's there. Intel has already used it at least twice to rapidly fix flaws in shipped MPUs. Tony

To: Sun Tzu who wrote (31059)	6/16/1999 6:26:00 PM
From: Tony Viola	Respond to of 70976

Sun, OT, microcode. Intel's MPU's and IBM's mainframes use a good deal of microcode in place of hard wired control logic. I can vouch for those two CPU families. Quick look at Intel site produced this: Built-in Self Test (BIST) provides single stuck-at fault coverage of the microcode and large logic arrays, as well as testing of the instruction cache, data cache, Translation Lookaside Buffers (TLBs), and ROMs. Use of microcode may not be as prevalent right now as in the 80's ,but it's there. Tony