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To: Amy J who wrote (83758)	6/18/1999 1:34:00 AM
From: Paul Engel	Read Replies (2) \| Respond to of 186894

Amy - Re: "But I didn't understand this part. What is suspect to soft error upsets? This gets technical. For DRAMs, data is stored as the presence or absence of electrons in the depletion region below a storage gate/capacitor. The depletion region is in the bulk silicon - right at the silicon surface - immediately under the storage gate oxide. Electrons - typically about 200,000 to 500,000 - are transferred into the region by an adjacent "half-transistor" - a read/write switch - whose source is connected to a bit-line, and whose gate is connected to a wordline. The "missing" drain is actually the depletion region which sits underneath the storage gate - right next to the read/write transistor. A "one" is defined as the absence of any free electrons in the depletion region below the storage gate, and a "zero" is defined as the presence of the 200,000 - 500,000 electrons below the storage gate, in the depletion region. These electrons are transferred in from the "bit line" via the word line, connecting to the pass transistor for the gate. An alpha-particle - basically a helium nucleus containing 2 neutrons and 2 protons - with an energy of from 1 to 10 eV (electron Volts) that impacts the silicon substrate in the vicinity of a storage gate will generate a shower of electron-hole pairs in the silicon, just below the sutface. These electron-hole pairs would normally recombine and have no effect. However, if the electron-hole pair "shower" is in the vicinity of a depletion region with NO ELECTRONS (empty) , the electric field associated with the depletion region (and the 3.3 volt supply voltage on the storage capacitor above it) will ATTRACT the electrons and cause them to diffuse into the depletion region due to this electric field. These electrons, if they number in the neighborhood of 200,000 to 500,000 (called Qcrit for Critical Charge), will then cause a "one" bit - which had been written to the memory cell - to now appear as a ZERO bit - since all these electrons from the alpha particle impact are now collected in the depletion region. The net result is a CORRUPTED bit - a memory bit written as a ONE becomes a ZERO - all due to the aplha particle impact in the region of the particular memory bit. WHere do these alpha particles come from? From almost everywhere. There are trace amounts of thorium and uranium - in parts per billion - in most materials - especially those with higher atomic weights. Organic materials - such as epoxy resins - used for encapsulation of memory chips - are more easily purified - and the FILLER MATERIAL - usually SiO2 - needs also to be purified. As it turns out, the PUREST MATERIAL - nearly free of these alpha particle producing elements - is SILICON. SRAM cells - with a full 6-transistor memory cell - are generally much less susceptible to soft-errors because they store information in a cross-coupled latch, with the latch transistors usually biased at Vcc and ground (for the opposite transistor of the pair) and many MILLIONS of electrons would be required to flip the diffusion node of one of these latches. Bacially, these soft-error upsets ONLY occur when the number of hole-electron pairs are created in a region where charge is stored in the substrate - such as in depletion region of a DRAM cell. However, as operating voltages drop, dynamic switching of nodes (diffusions) in a logic structure such as a microprocessor may become susceptible to corruption by charge collection from electron-hole pairs created by an alpha particles in the bulk silicon near the node INSTEAD OF the proper electrical switching of that node from a normal logic operation. Silicon-on-Insulator structures may result in substrates that are nearly immune to this problem. Paul