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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Process Boy who wrote (62382)6/19/1999 12:19:00 AM
From: kash johal  Read Replies (2) | Respond to of 1571924
 
PB,

Re:"I wish we didn't have the technical difficulty that caused the slip, but we did. The problem just recently became apparent. There was very little time between discovery and disclosure. I don't know what else could have been done, except turn back time and road map a November release date, or have the issue magically go away.

Again, you have every right to be disappointed, mad, whatever that there was a slip. However, Intel management acted properly in this circumstance, IMO. I know virtually 100% of the issues involved here, and if I were running things, I would have made the announcement at the same time they did, because before yesterday there was not enough data to tip the scales, but after yesterday there was enough evidence to suggest the target was in jeopardy."

Look we all know that sh*t happens ok so no big deal.

Are you confident that the problem is well understood and identified to the point where have only slipped by 2 months.

In my experience any kind of a process tweak will require process requals which take lots of time and calls into question the probability of November actually hapeening.

If Intel delays again it will lose them lots of credibility.

IMHO they should have delayed it till next year and still worked like hell to meet the November date. And if they could then they could be heroes but the bad news would have been out in one fell swoop.

Just my opinion.

Regards,

Kash




To: Process Boy who wrote (62382)6/19/1999 12:42:00 AM
From: grok  Read Replies (2) | Respond to of 1571924
 
RE: <I know virtually 100% of the issues involved here>

It seems to me that the problem must be in metalization rather than in frontend like Paul says. It's tough to accurately model and extract metal loads and the ratio of criticalness between transistors and interconnect is shifting toward interconnect due to the continuous scaling of each generation. My guess is that a number of paths turned critical due to crosstalk and rc delays and this came as a surprise.

Comments?