To: C. Niebucc who wrote (42331 ) 6/21/1999 1:09:00 PM From: DiViT Respond to of 50808
Matsushita uses 32-bit RISC and Media Core processing engines -- Set-top rolled into one chip Yoshiko Hara 06/21/1999 Electronic Engineering Times Page 39 Copyright 1999 CMP Publications Inc. Tokyo - In a bid to enter the chip market for set-top boxes, Matsushita Electric Industrial Co. Ltd. will introduce a single-chip solution that can be programmed to decode all standard-definition 480i and 480p formats used around the world for digital-TV broadcasts. The company hopes to capture 20 percent of the silicon set-top market by 2000. Matsushita engineers have integrated all functionality of a set-top box into the device, excluding the front-end, RF receiving section. The chip includes two processing engines: Matsushita's proprietary AM33 32-bit RISC processor and its Media Core processor, developed for audio/video data processing. "Despite the fact that TV receivers have more and more functions, their prices have been eroding to the point that TV set manufacturers cannot make a profit in Japan," said Kazumi Kawashima, director of Matsushita's consumer-system LSI development center. "A one-chip solution has really come into demand." The chip will replace Matsushita's previous five-piece chip set, which the company used for a set-top board. The monolithic solution cuts board space requirements by 60 percent, according to the company. Kawashima said the integration will reduce costs as well. The 10 million-transistor device hits 121 Mips with power consumption of 2.6 W. Cross-bus switches help it achieve about 3.5 times better performance than a single-bus device, said Yoshio Abe, a development manager at the consumer LSI group. The cross-bus structure eliminates bottlenecks caused when signals wait for the bus to clear. Hence, the data-transfer rate is about 800 Mbits/s, some four times faster than conventional designs, he said. Fabricated in 0.25-micron CMOS, the chip comes in 441-pin BGA. Though Matsushita allied with Microsoft Corp. last July to use Windows CE for set-top products, the new chip uses PieOS, Matsushita's proprietary real-time OS. Matsushita says it will use PieOS for basic-function TV receivers and WinCE for those with interactive functions. The new device is intended for standard-definition TV signal decoding. "To decode high-definition broadcasting, another HD decoding chip is necessary for [use with] this chip," said Teiji Nishizawa, general manager of the System Architecture Group. "We are going to offer an HD-ready chip fabricated on an 0.18-micron process next year." Matsushita will begin sampling the device this month for about $67, and will begin volume production simultaneously at 50,000 pieces per month. Volumes will rise to 100,000 per month later this year. 'Small chance for entry' The chip market for set-tops-which Kawashima said was 15 million units this year and 20 million in 2000-is split by foreign suppliers such as STMicro-electronics, C-Cube and ATI Technologies. "The market leaves a small chance for a Japanese consumer electronics giant to enter," said Michito Kimura, an analyst at IDC Japan Ltd. "Matsushita is probably going to target BSkyB set-tops in the United Kingdom, but STM has established its position in this field. Major set-top suppliers have already formed ties with chip vendors. It should be very difficult to enter now, especially in the United States." "Whether Matsushita can achieve a 20 percent share or not will depend on how large a share the company intends to have in the digital-TV set market," said Satoru Rick Oyama, senior analyst at ABN Amro Securities (Japan) Ltd., noting that the chip will go into Matsushita's own TVs. "It will be difficult to sell the part to third-party set-top-box vendors." Japanese chip companies are still a small presence in the set-top market. NEC Corp. began sampling a system-on-chip design for set-tops last June, and started shipping to vendors in Europe in March. Shipments are still falling short of NEC's original plan of 200,000 units a month. NEC will begin shipping the part outside of Europe this fall, and plans to produce 150,000 to 200,000 units a month at that time. Hitachi Ltd. formed an alliance with STM in late 1997 to jointly development a version of Hitachi's SH-5 processor and to license the SH architecture to STM. STM will use the SH-4 architecture for its next-generation set-top chip. June 21, 1999