ciruslvr,
For the techies here:
NEC set to unleash T-Rex 64-bit MIPS processors
By Anthony Cataldo
EE Times
(06/24/99, 6:10 p.m. EDT)
TOKYO — NEC Corp. is preparing to roll out the first of a series of internally developed 64-bit R12000 MIPS processors that will be manufactured on the company's new high-performance 0.15-micron process technology. The company also has plans to introduce by next year a next-generation MIPS device — the R14000 — that will be based on the same design rules and will feature copper interconnects, NEC officials said.
The first of NEC's 0.15-micron "T-Rex" processors, dubbed R12000, should come out later this year. Running at 400 MHz, the device will have a SPECint95 performance (integer) rating of 23 and a SPECfp95 (floating-point) rating of 36. A second version, the 450-MHz 12000-S, should follow later this year. That device will have a SPECint95 rating of 26 and a SPECfp95 of 41, according to NEC's road map.
NEC expects to derive much of the processor's added performance from its shift to 0.15-micron process technology, which the company is rolling out simultaneously with its 0.18-micron process. While the 0.18-micron process is intended for a wider range of designs, the 0.15-micron process is built for speed. It uses an extra mask step for ion channel implantation, which has reduced the parasitic junction capacitance to one-tenth of that in the 0.18-micron process.
Shape of a keyhole
NEC also has reduced wire capacitance by using a special chemical-vapor-deposition process to form a keyhole-shaped air gap between the metal lines.
To further enhance speed, NEC increased the on-current by 25 percent over the 0.18-micron process. It also knocked down the threshold voltage (Vt) of the transistors to 0.25 V vs. 0.45 V for the 0.18-micron process. Reducing the Vt causes leakage current to increase and hence power dissipation will be higher — between 20 and 30 watts — but it isn't a big concern.
"To get speed, we have to reduce the Vt for the 0.15-micron generation. High-performance RISC processors pay little attention to leakage current, so we can reduce the Vt," said Eiji Sugimoto, general manager of NEC's System LSI Engineering Division.
All told, NEC will be able to realize a twofold performance gain compared with its 0.18-micron process, which is more geared toward system-on-chip applications that often must trade off speed for lower power consumption and cost.
By next year, NEC intends to introduce copper interconnects into its 0.15-micron process, and once again, the MIPS processor will be the first in line. The company aims to roll the device, the R14000 running at 500 MHz, with a 31 SPECint95 and a 45 SPECfp95 rating, according to NEC.
"From our test vehicle we can obtain a 20 to 30 percent increase in performance using copper," said Masahiko Nakamae, chief manager of the System LSI Design Engineering Division for NEC. "For the 0.15-micron generation, we'll use copper only for high-end RISC processors."
Rather than use a hybrid copper-plus-aluminum scheme as some chip companies have opted to do, NEC will use copper for each of the metal layers. "If you use aluminum and copper together, we would have to use an aluminum CMP [chemical mechanical polishing] and a copper CMP," said Nakamae. "For us, the first four metal layers will use copper, and the fifth and sixth layers will use thick copper for the global interconnect."
Nakamae added that NEC will include copper in its mainstream process technology when it moves to the next technology generation, which will either be a 0.13- or 0.12-micron process.
Unlike previous-generation MIPS processors, the T-Rex series is being developed entirely within NEC. Silicon Graphics Inc. (SGI) was the chief patron of MIPS development, but last year decided to reduce its stake in processor development and spin off its MIPS division into a separate company.
That company, MIPS Technologies Inc., now focuses mainly on embedded consumer-electronics applications, while licensees such as NEC continue to develop their own processors. NEC will use T-Rex for its servers and workstations, but continues to keep SGI informed of processor developments, a spokesman said.
Though SGI has introduced a line of workstations based on Intel's IA-32 processors and will eventually move to IA-64, the company still has plans to use MIPS processors in concurrent workstation lines, including systems based on the R14000 from NEC.
T-Rex will come out at a time when Intel is putting the final touches on its first 64-bit processor, the Merced, which is due to sample later this year. IBM, meanwhile, is about to roll out its own 0.22-micron-based 64-bit PowerPC processors. They will include both copper interconnect and silicon-on-insulator (SOI) technology, which IBM claims eliminates junction capacitance and boosts performance between 25 and 35 percent.
NEC, which has been studying SOI for some time and has even developed its own process technology for 0.18 micron, is holding back for now. Nakame said SOI may be employed when bulk CMOS scaling starts to reach its limits, around the 0.1-micron generation.
"If it comes to the point where there is a physical limit for bulk CMOS, we can move to SOI because it has the potential to move us past bulk," he said. "The problem is if we start we have to develop another SOI CMOS library. We also have to be careful about its stability, and we still don't have the automated design tools."
|
