Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Ali Chen who wrote (63636)	6/28/1999 5:47:00 PM
From: kash johal	Read Replies (2) \| Respond to of 1572373

Ali, Seagate warning as we speak. Could be trouble for PC stovks tomorrow: Monday June 28, 5:24 pm Eastern Time Seagate Cites Weak Disc Drive Demand, Price Deterioration Regards, Kash

To: Ali Chen who wrote (63636)	6/28/1999 5:54:00 PM
From: Stormweaver	Respond to of 1572373

Thanks for the info ... interestingly DEC only goes 14 ways currently; not including clustering. I think this is a limitation of the # of slots and addressing thereof; it's a pity since the Alpha has so much raw horsepower relative to anything else out there. I'll be browsing and learning about the Athlon. Cheers James

To: Ali Chen who wrote (63636)	6/28/1999 10:52:00 PM
From: Elmer	Read Replies (1) \| Respond to of 1572373

Re: "Digital has developed a set of chips called "Tsunami" that theoretically allows to interconnect as many EV6-compliant processors as you wish (limited only by processor ID field, if architecture is non-clustering). Oddly enough that Intel is the manufacturer of these chips by DEC-Intel settlement." Ali, seeing as each processor needs it's own port and assorted pins, how does this chipset allow for adding an unlimited number of ports without cascading them? EP