Chip industry looking to hammer out technology road map
eetimes.com
By David Lammers
EE Times
(07/02/99, 2:20 p.m. EDT)
AUSTIN, Texas — With the lessons learned from the delayed transition to
12-inch (300-mm) wafers still painfully fresh, the semiconductor equipment
industry is developing an equipment and materials road map that would
overlay the more comprehensive International Semiconductor Technology
Roadmap.
Representatives from the leading equipment vendors will meet on July 8 and
9 in Santa Clara, Calif., to discuss the technology timetable. A further set of
meetings is planned for Semicon West, which begins July 12 in San
Francisco; those sessions will involve leaders of the major equipment
associations, including Stanley Myers, president of Semiconductor Equipment
and Materials International (SEMI); Paul Peercy, president of
SEMI/Sematech, and representatives from the Semiconductor Equipment
Association of Japan (SEAJ).
The movement toward an equipment road map comes as the semiconductor
industry faces a transition to largely unproven technologies: copper
interconnects, low-dielectric-constant (low-k) intermetal dielectric materials,
high-k gate insulators, and next-generation, non-optical lithographic tools.
"A couple of years ago, some of the IC vendors blamed us for not jumping
right in to develop 300-mm equipment, but we were cautious for a reason,"
said one executive at a leading equipment vendor. "Even now, it is not clear
how quickly a majority of the ICs will be manufactured on 300-mm wafers.
And now we have in front of us these other big, big transitions — to copper,
low-k, high-k. It's going to be very challenging."
SEMI and several major equipment vendors have been working on cost
models that try to detail the investments required to move to new equipment
and technologies. Uppermost in their minds, the executive said, is the
300-mm experience, when much of the industry bought into what proved to
be overly optimistic predictions.
In mid-June, a group comprising Sematech chief executive officer Mark
Melliar-Smith; Peercy; Frank Robinson, head of the I300I equipment group;
and a delegation of Sematech board members went to Japan to meet with
representatives of Selete (Yokohama, Japan), a privately financed
organization working to develop 300-mm equipment and manufacturing
technologies.
"We want to move to collaborative efforts rather than just cooperation and
information sharing," Melliar-Smith said. "By moving to jointly funded
projects, we can bring more resources to these challenges. With
collaboration, we can save 50 cents on the dollar, rather than the 3 cents
saved with cooperation, which tends to be at the back end and much of
which is window dressing."
The Sematech/Selete meeting, held at a hotel near Narita Airport June 16,
may result in jointly funded evaluation of 300-mm equipment. One likely
collaboration would focus on mask technologies, particularly mask inspection
and repair.
During a June 17 meeting in Kyongju, South Korea, the Sematech contingent
also met with the chief executives of 17 equipment vendors and their aides.
The 32 people around the conference table discussed "how the two sectors
can work better together," Melliar-Smith said. "The equipment vendors and
the device makers have gone through some tough times, and the 300-mm
experience didn't exactly help matters. The suppliers got a lot of things off
their chests."
Detailed information about the Kyongju meeting is available online at the
Sematech Web site.
One source of tension among the equipment vendors is the recent speedup of
process generations. The International Semiconductor Technology Roadmap
has pulled in targets for the major technology "nodes." The revised road map
envisions a much faster transition and more aggressive targets than
previously outlined, calling for a shift to 0.09-micron line widths — rather
than the previous 0.1 micron — by 2005 or early 2006, as much as two years
earlier than initially predicted.
A Japanese semiconductor executive "on loan" to the Semiconductor
Industry Research Institute of Japan (Tokyo) said that while those targets
might match up well with the needs of the most aggressive IC
manufacturers, such as Intel, the road map's newer targets may be out of
synch with the needs of the overall device industry. That may be particularly
true in consumer markets, the executive said, where cost containment is a
top priority.
Melliar-Smith asserted that "the road map cannot be a whipping boy. It has
been a very, very useful instrument. What we need to do is create an
exercise of 'lessons learned,' rather than engage in finger pointing."
This week, Sematech appointed David Anderson to the new position of
director of supplier relations. Anderson had worked at SEMI/Sematech.
Peercy of SEMI/Sematech noted that the new position is a reflection of the
trend among the equipment vendors to move upstream, into process
integration and materials development. And Melliar-Smith said the device
manufacturers, in an age of system-level integration (SLI), are taking over
some of the work earlier performed by the system vendors. More attention is
being paid to system architectures, core integration and, particularly, the
algorithms, embedded software and other software issues required to achieve
SLI.
As equipment and device makers spread their resources over wider targets,
Sematech is sharpening its focus on manufacturing issues, which are
becoming more important as the industry moves from aluminum to copper
interconnects, from silicon dioxide to low-k and high-k insulation materials,
from wire bonding to flip-chip packaging, and from optical lithography to
some yet-to-be-determined form of next-generation lithography.
Melliar-Smith said he wants the lithography-research effort at Sematech to
work much more closely with the leading European research institutes even
as it moves to collaborative efforts with Japan's Selete. Sematech
researchers have established relationships with their counterparts at the
Grenoble Submicron Silicon Initiative (Grenoble, France); the Interuniversities
Microelectronics Center (Leuven, Belgium); the Laboratory of Electronics,
Technology and Instrumentation (part of the French Atomic Energy
Commission); and Germany's Fraunhofer Institutes.
Collaborative research is particularly important in light of Sematech's own
budgetary situation. The federal government poured nearly $150 million a
year into Sematech over the first six years of its existence, when Sematech's
raison d'être was to reclaim ground lost to Japan's device and equipment
industry.
After federal funding ended, the annual budget fell back to about $150 million
per year, and last year, Melliar-Smith said, "a decision was made to reduce
the dues to $125 million. We had to share the pain being felt by the
semiconductor industry, so dues were reduced about 15 percent to 17
percent."
During the three-year industry recession, Samsung withdrew from the
consortium, though Melliar-Smith said he hopes the company will return to
the fold. National Semiconductor quit Sematech last December and is not
expected to return until its financial condition improves.
This year, the U.S.-based Sematech members and the non-U.S.-based
members of International Sematech have gradually been combining efforts.
The expectation is that all of the various research programs will be combined
into one organization, named International Sematech, by year's end.
"It reminds me of the quip going around the defense industry: 'What do you
do after the cold war?' " said Melliar-Smith. "For the semiconductor industry,
the challenge is how to stay on the traditional curve of reducing transistor
costs by 25 percent a year. And that comes as we get to much more difficult
manufacturing challenges with these new materials."
International Sematech members include Advanced Micro Devices,
Compaq/Digital, Conexant, Hewlett-Packard, Hyundai, Infineon
Technologies, Intel, IBM, Lucent, Motorola, Philips Semiconductors,
STMicroelectronics, Taiwan Semiconductor Manufacturing Co. and Texas
Instruments. |
