ISSI's current rise: New opportunities and Increasing SRAM demand
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Torpid SRAM Market Gets A Needed Jolt -- Vendors benefit from dynamic developments in communications.
Jul. 02, 1999 (Electronic Buyers News - CMP via COMTEX) -- The communications market is providing SRAM vendors with their first good news in a long time. Amid declining demand, including a decrease in the use of SRAMs for PC cache and reduced calls for asynchronous parts, SRAM vendors are rerouting their product roadmaps to target emerging datacommunications and telecommunications applications.
This trend is also giving rise to SRAM suppliers' development of other, complementary technologies such as flash memory, as well as advanced packaging.
In the next few years, sales to the communications sector will account for a larger percentage of the global SRAM market, growing from 36% of total unit sales in 1998 to 44% in 2003, according to Semico Research Corp., Phoenix.
This increasing demand is driving SRAM prices upward for the first time in years, as availability has tightened in recent months. Companies that offer both DRAMs and SRAMs have been reducing capacity for SRAM production, creating a shortage. Now, the boost from the telecom and datacom segments has caused demand to catch up with supply, according to industry analysts.
New products from a number of major vendors demonstrate the degree to which wireless markets-and cellular phones in particular-are driving demand for asynchronous SRAMs, even as these devices are in decline overall. Designed to save space and extend battery life while meeting handset designers' low-voltage requirements, the so-called "slow," low-power asynchronous SRAMs are fulfilling a need as digital cellular handsets replace their analog ancestors.
For the longer haul, faster, higher-performance synchronous SRAMs are finding increasing acceptance in communications applications such as routers, switches, and cellular base stations.
"Asynchronous parts are kind of going away, and synchronous SRAM is taking over," said Adrienne Downey, a research analyst at Semico. "Switches and routers are moving away from asynchronous so they can take advantage of the faster access times of synchronous SRAMs."
The trend toward synchronous is exemplified by a new family of 4-Mbit devices from Integrated Device Technology Inc., Santa Clara, Calif. The 3.3-V SRAMs, which operate at 200 MHz in a pipelined-burst version and also include flow-through flavors with an access time of 7.5 ns, are for designers who need increased system bandwidth for advanced networking and datacom applications.
"Designers want more bandwidth per pin," said Pat Lasserre, strategic marketing manager at IDT's SRAM division. "They're trying to push more data through their systems, and they have a real need to solve the bottleneck issues of pipelined-burst SRAM. You can go to alternate solutions like a wider bus, but that increases the cost per pin for the ASIC vendor."
IDT's new 4-Mbit devices are available with 3.3- or 2.5-V I/O, which allows them to interface with embedded processors, custom ASICs, and DSPs such as Texas Instruments Inc.'s C6x family, which has a direct memory interface to ease design-in.
The 4-Mbit SRAMs went into volume production last month, and are available in a TQFP or BGA at $34.95 in 10,000s.
Also aiming at next-generation networking applications, Samsung Semiconductor Inc. last month began sampling its 16-Mbit NtRAM. The device operates on a 2.5-V power supply at speeds up to 150 MHz, with an access time of 3.8 ns. The company's 2.5-V, 8-Mbit KM736S849T is sampling at speeds up to 250 MHz. Both the 16- and 8-Mbit devices are available in a TQFP or BGA.
In addition to addressing designers' needs for higher performance, Samsung's NtRAMs are aimed at extending the company's leading SRAM position into niche markets such as network switching and routing, including switches that connect users to a server, and routers that provide high-speed Internet connectivity, said J.B. Ra, senior marketing manager for static memory, San Jose.
"Samsung has been focusing on supplying SRAMs to the mobile and PC cache memory markets," Ra said. "Now we have to look at both big applications and small niche markets, because the market is so tight for SRAM worldwide. A lot of companies have pulled back their SRAM business over the past three years."
Another company that began last month to sample NtRAM is Toshiba America Electronic Components Inc. Its 9-Mbit device is designed to provide 100% bus efficiency for faster performance in networking products, said Scott Nelson, business-development manager for SRAM at TAEC's Memory Business Unit, Irvine, Calif.
The company's initial lineup of NtRAMs includes pipelined-burst versions at 150, 143, and 133 MHz, and flow-through burst at 83 and 75 MHz. The 150-MHz device features 3.8-ns access time, and 9 ns for the 83-MHz flow-through version. TAEC's NtRAMs operate from a single 3.3-V power supply, support both 3.3- and 2.5-V I/O, and come in a 100-pin LQFP. Samples of the150-MHz device are $60 in 1,000s. Volume production of all versions is scheduled for later this quarter.
Cache payoff
In addition to hitting their mark in leading-edge communications segments, SRAM vendors are finding better-than-expected demand for synchronous devices in the PC cache market. L2 cache use is declining as microprocessor OEMs integrate more memory on-chip, but PC makers' appetite for SRAM has not decreased as quickly as anticipated.
"We see the whole PC market for SRAM going away over the next few years," Semico's Downey said. "First the notebooks, then the PC, and then the low-end workstations. But right now, PC makers are using more L2 cache than we expected. The move toward integration is going more slowly than we-or the PC suppliers-expected."
Motorola Inc.'s Semiconductor Products Sector, Austin, Texas, recently announced an 8-Mbit, 333-MHz L2 cache SRAM that is the first to drive down power dissipation via the use of copper interconnects, according to Motorola SPS. By integrating copper with leading-edge 0.15-micron CMOS process technology, the MCM63R836FC reduces power consumption by as much as 50% to 70%, compared with previous BiCMOS SRAMs, the company said.
While Motorola's device, which is sold for $165 in quantities of 10, 000, demonstrates that PC cache still has some legs, the overall sales decrease in this segment is pushing other SRAM suppliers to look for higher ground.
"A couple of years ago, PC cache consumed 80% of all high-speed SRAM. Now the market has shifted toward telecom and datacom, and some embedded applications," said Andre Hassan, general manager for memory products at MoSys Inc., Sunnyvale, Calif. "The decline of SRAM use in PC cache has pushed the market to look for other applications, so SRAMs are now evolving on the logical interface as well as the physical side."
Integration figures heavily in MoSys' plans. With current discrete offerings that include 8-Mbit pipelined and flow-through SRAMs for the cache market, the company has expanded its scope by licensing its 1T-SRAM cores for system-on-a-chip designs.
Thanks to a single-transistor cell architecture, MoSys' 1T-SRAM achieves densities up to 128 Mbits while maintaining the refresh-free interface and low latency common to six-transistor SRAM cells. This design also reduces power consumption to as little as one-fourth that of a standard SRAM, and can be integrated with DSP and processor cores in standard 0.18- or 0.25-micron processes, according to MoSys.
Initial licensees of the company's SRAM IP include Analog Devices Inc., Lexra Inc., NEC Corp., and Taiwan Semiconductor Manufacturing Co. Ltd.
"Designers are trying to get their main memory embedded in applications where they need high bandwidth and high bus rate," said Mark-Eric Jones, vice president and general manager for intellectual property at MoSys. "The 1T-SRAM allows them to achieve DRAM density with SRAM speed and latency; so as they come up with novel products, it allows them in some cases to cut out an entire level of memory hierarchy."
In addition to its IP business, MoSys plans to continue developing its line of discrete SRAMs. The company recently introduced a family of 8- and 9-Mbit pipelined-burst and flow-through devices that it claims offer the industry's lowest power consumption at 60-mA active current.
The pipelined-burst SRAM operates at 166 MHz with 4-ns access time, and is available in an LQFP for $27.30 (9-Mbit) and $24.40 (8-Mbit) in 1,000s. The 100-MHz, 8.5-ns flow-through version is priced at $28.10 (9-Mbit) and $24.65 (8-Mbit), also in 1,000s.
The dual path of developing IP and discretes gives MoSys a synergy that could prove an attractive model for other SRAM vendors.
"We use our own technology in developing discrete SRAM products, which gives us the advantage of understanding high-volume production," Jones said. "Too many IP companies don't understand that. We take our products to high volume before we make our IP available to others."
Related technologies
Market shifts are driving the development of a host of related technologies that figure prominently in SRAM vendors' plans.
The rapid increase of SRAM use in cell phones, for example, has given an edge to SRAM suppliers such as Intel Corp., Mitsubishi Electronics America Inc., and Sharp Microelectronics of the Americas that also offer flash-memory products and advanced packaging options.
By providing SRAM, flash, and multichip modules (MCMs) or chip-scale packaging (CSP), these companies can serve as one-stop shops for handset OEMs moving their product lines from analog to digital.
"The space savings are incredible when you put two discretes into a single package," said Narayan Purohit, associate vice president of Mitsubishi's memory division in Sunnyvale. "The manufacturing cost also decreases, because you're not doing two assemblies. In the long run, stacked MCM and CSP packaging will be the most cost-effective solutions."
Mitsubishi's M6MGB/T16S2BVP family of combination flash/SRAM devices uses a stacked-MCM design that mounts the flash and SRAM back-to-back in a 48-pin shrink TSOP, saving 45% of the space that would normally be required for separate ICs, according to the company.
The stacked-CSP option combines low-power SRAM and flash in a package less than half the size of a 48-lead TSOP-I. The low-power, small-footprint devices are aimed primarily at the mobile-device market.
"Because battery life and talk time are becoming critical considerations in cellular phones, designers are trying to save every bit of power they can," Purohit said. "We're seeing a trend toward lower power-supply voltages even though access time is staying the same or getting faster."
Hyundai Electronics America, San Jose, is another company that sees combined flash and SRAM devices as a means of increasing its presence in the wireless arena.
"With our packaging and SRAM technology, we're already where we need to be," said Mike Ramirez, product marketing manager for SRAM products. "We have the 1.8-V SRAM, and our 3-V flash will be available early next year, so we're looking at doing multichip packaging."
The company's current SRAM offerings range from 64 Kbits to 4 Mbits, and are available in microBGAs.
"Later this year, we'll introduce a TSOP for customers who are BGA-averse," said Roman Komanovsky, Hyundai's SRAM tactical product manager. "MicroBGA fulfills our customers' needs when they have a premium on space, but it's not the most cost-effective solution, so we're looking at alternatives."
Memory competitors
Even as it gains a foothold in emerging communications markets, SRAM faces increasing competition from other types of memory, such as content-addressable memories (CAMs).
"A number of players are jumping into CAMs directed at the networking and communications markets," said T.J. Mueller, director of marketing at NetLogic Microsystems Inc., Mountain View, Calif. "We've taken SRAM-based experience, know-how, and design and leveraged it into our CAMs, and now into our CIDR processor, which turns a CAM into a sophisticated silicon search engine."
The CIDR (Classless Inter Domain Routing) processor is a 1-Mbit, 32-Kx40 single-chip device that accelerates the processing of Internet Protocol IPv4 data packets. The device speeds up routers' table-address lookups-which determine where a packet will be sent next-by performing a match at a sustained rate of 66 million searches per second.
"CAMs haven't yet gotten to the level of SRAMs and DRAMs because of power, density, and cost issues," Mueller said. "But given the current state of the Internet, in which core routers are pretty fast but cable modems and DSL are giving the end user bigger data pipes, there's more pressure on the big routers to be faster, and that's driving the need for new solutions like ternary CAMs.
"A CAM is an inverse SRAM, really, because you provide it with an operand and it returns an address in memory," he said. "Large SRAM vendors could easily jump into CAMs for the networking market, because we're talking about SRAM-type technology."
Optimism reigns
Whatever the exact shape of the future, SRAM vendors' rising profile in communications is leading to greater optimism among them than has been seen in some time.
"The handheld market is projected to grow at a 40% annual rate over the next few years, and that's the main growth area for SRAM," Hyundai's Komanovsky said. "When you look at dollars per Mbit, SRAM is still way ahead of DRAM. Companies that know their niche markets and are able to do cost-effective die shrinks will always make money."
"SRAM has a bright future," agrees Samsung's Ra. "More than 280 million handsets will be produced this year, and that means a huge demand for SRAMs. For the next two years, we're going to be strong, based on current applications. After that, who knows? In the worst-case scenario, SRAM will be down for a while, and then it will grow in the embedded area."
-Patrick Walsh is a freelance writer based in Peekskill, N.Y.
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By: Patrick Walsh
Copyright 1999 CMP Media Inc.
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