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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: unclewest who wrote (24631)	7/13/1999 4:44:00 PM
From: Brian1970	Read Replies (1) \| Respond to of 93625

Sorry, I'm dense today. Are you gleeful over good news, or are you laughing at a ridiculous post? I can't tell from your post. Thanks for clueing in this clueless investor.

To: unclewest who wrote (24631)	7/13/1999 4:52:00 PM
From: Jdaasoc	Read Replies (1) \| Respond to of 93625

Unclewest: Found this hidden in eetimes.com. I think it verifies future RAM for desktops being RDRAM primarily. With 1 or 2 chips not modules necessary. eetimes.com "The die size of a 1-Gbit DRAM at 0.13 micron is over 200 millimeters squared," he said. "Usually the biggest die size for a product now is 170-to-180 mm squared. That's the maximum." What's more, observers said that 1-Gbit DRAMs will be overkill for the memory requirements of low-cost PCs. Like Fujitsu, Toshiba is also looking to put 512-Mbit DRAMs on its road map. That density is particularly well-suited for Direct Rambus DRAMs because it will provide the right minimum granularity requirements, Toshiba's Kuyama said. "One CPU, a chip set and one Rambus DRAM can make up one system with 64-Mbytes of memory," he said. "But in the case of SDRAM, it's going to be 256-Mbytes minimum for a x16 size, and that's too big." Hidemori Inukai, chief manager of memory product development at NEC, said it's becoming more difficult to meet minimum granularity requirements for PCs using traditional power-interface DRAMs, such as SDRAM and EDO DRAMs, because they must accommodate a PC's 64-bit-wide memory path. To meet the 64-bit bus requirements, a PC requires a minimum of eight 8-bit-wide SDRAMs or four 16-bit-wide SDRAMs on one module, regardless of the density of those chips. If 256-Mbit DRAMs were used to meet those requirements, they produce a minimum granularity of 256 or 128 Mbytes — which exceeds the 64-Mbyte memory requirement assumed for future low-end PCs, observers said. Another possibility is a 32-bit-wide SDRAM, only two of which would meet the need of a PC's main memory subsystem. But NEC's Inukai said that widening a DRAM's I/O increases its power consumption. "In general we want x-16 from an IC drivability point of view," he said. Protocol-based Direct Rambus DRAMs, on the other hand, use a special two-byte-wide data path that delivers up to 1.6 Gbytes/second of bandwidth from a single Direct RDRAM. Inukai said the 64-Mbyte minimum granularity that a Rambus DRAM provides in one 512-Mbit chip will likely meet PC makers' target. "By the year 2001, the low end will still probably use 64-Mbytes, so 512-Mbits seems to be a good granularity," he said. A 0.15-micron process should be adequate to begin mass production of 512-Mbit DRAMs, Toshiba's Kuyama said. At that point, the extra die area needed for Direct Rambus will fall to 10 percent of a chip, he said. NEC plans to start sampling 512-Mbit DRAMs in the second half of 2000, and should begin production using 0.15-micron design rules by 2001, a company spokesman said. Based on current memory consumption trends in the PC market, however, it's still unclear whether 1-Gbit DRAMs will be much of a show stopper for volume PC shipments. "If we don't look at PCs, 1-Gbit is fine for servers or workstations that like to have 10-Gbytes of memory. But from a market size point of view, it's not a huge market," Inukai said. "From the 128-Mbit generation onward, going to twice-bigger densities is fine from both an application and production point of view."