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To: quidditch who wrote (35626)	7/19/1999 12:05:00 PM
From: w molloy	Read Replies (2) \| Respond to of 152472

re ASIC architectures.... Hello Steve, someone else saying that running CDMA core and Palm-like computer microprocessor functions (and by extension, 3G multi-media DSP type functions) on the same ASIC would be a significant error, as the added software code required to enable the hard-wired ASIC would leave the chip either error prone or much slower than two separate microprocessors. Any recollection of this? If so, your (or engineer's or w m's )thoughts now.? Regards. Steven I have no recollection of this statement. I responded a while ago on mounting different operating systems on a chip. Vendors such as QCOM, CNXT, DSP, LSI, VLSI, etc are all moving towards 'system on a chip' solutions. Current solutions typically integrate a single Control Processor (e.g. ARM) with a single DSP (sometimes third party e.g. TXN's TMS series, sometimes an in-house design) in a single package. Note that this package can contain more than one chip (so 'system on a chip' is something of a misnomer...). As ASIC design tools and methodology have become more sophisticated, it is common to integrate the CPU/DSP with memory and additional circuitry on a chip, then package it with additional chips that adds other functionality. Next generation solutions may offer additional CPU's e.g. CPU 1 - looks after MMI/GUI. May well host an OS like EPOC, CE, or PalmOS CPU 2 - looks after the protocol stacks (TCP/IP, IS-95, IS-707). May host a more efficient OS like RTXc, Wind River etc DSP - looks after the 'physical layer' i.e. the air interface for CDMA, GSM whatever. It would also control CODEC's etc. CPU1, CPU2 and the DSP cores (plus memory and communication busses) could all be integrated on a single chip (as opposed to package), without the increase in error you allude to. I should point out that this is a simplistic view . There are many trade offs that I haven't considered. Hope this makes sense. w.