Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: kapkan4u who wrote (86241)	7/27/1999 11:51:00 PM
From: Tenchusatsu	Respond to of 186894

<What is the combined bandwidth of PCI and AGP interfaces? If it is close to 0.8 GB/sec then there is no vacant bandwidth. Right? What about DDR266 SDRAM instead of DRDRAM?> It's hard to illustrate on these message boards. But in a nutshell, it's not processor bus bandwidth that is the limiting factor. Rather, it's the memory. In other words, it's not like this: 1) Processor-to-memory 2) Processor-to-AGP 3) Processor-to-PCI but more like this: 1) Processor-to-memory 2) AGP-to-memory 3) PCI-to-memory Sure, there is some processor-to-AGP and processor-to-PCI traffic, but not as much. Tenchusatsu P.S. - Since you asked, bandwidth of AGP-2x bus is 0.53 GB/sec. Bandwidth of PCI bus is 0.13 GB/sec. Adding them up together gives you about 0.67 GB/sec. Bandwidth of DDR SDRAM will be 2.12 GB/sec.