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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: THE WATSONYOUTH who wrote (68468)	8/11/1999 3:07:00 AM
From: Process Boy	Respond to of 1579788

THE WATSONYOUTH - <The AMD folks better not depend on Cu BEOL to tip the scales in this race. Even if AMD combines Cu and low k dielectric, it would at best be a 5% performance advantage based on the different BEOLs. What goes on in the FEOL and the design differences will determine the winner in this race.> Your statement seems to agree with Chou, Bohr, et al. The =<5% performance increase for Cu : Al is consistent with estimates I have seen. Also, As I believe you have gleaned, Intel stresses FEOL performance as its key strategy in developing competitive process performance. However, Cu is in the works for .13 and beyond at Intel. <Also I think AMD uses a nitride etch stop at both the via and line levels.> The use of Nitrides in materials for etch stops is a seemingly problematic issue with Cu at this point on the learning curve. <This results in lower intralevel and interlevel capacitance as well a lower line level sheet resistance (because of thicker Al lines) This is not easy. But they do it to avoid having to use Cu at .18um. The result will be be no worse than what AMD will achieve from Cu BEOL if their process is as I assume.> Yep. This is the approach. I anxiously await to see if the results pan out as Intel Process big wigs have predicted up to 2 years ago. Although I submit that Intel may be pretty good at working with the high aspect ratio ground rules, mitigating some of the difficulty, i.e., this approach shouldn't be a significant yield limiter. <I don't believe AMD is using low k dielectric along with the Cu at .18um (can anyone confirm?)> This is a good question, that I don't have the answer to. PB