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To: Jdaasoc who wrote (26953)	8/11/1999 9:59:00 PM
From: Jdaasoc	Respond to of 93625

Hyundai addressing powr consumption of multibank RDRAMS -------------------------------------------------------------------------------- United States Patent 5,936,432 Oh , et al. August 10, 1999 -------------------------------------------------------------------------------- High speed low power amplifier circuit Abstract An amplifier circuit that maintains high speed and reduces power consumption while operating with reduced voltages is disclosed. Broadly, the amplifier circuit of the present invention includes a set-up circuit that performs a level shift on the input signal and applies it to the inputs of a sense amplifier in a cross-coupled fashion. The circuit operates such that one leg of the precharged sense amplifier output discharges in response to the input without a counteracting charging action by the other leg of the sense amplifier output. The amplifier circuit thus operates at higher speed and with no crowbar current even with input signals of smaller magnitude. -------------------------------------------------------------------------------- Inventors: Oh; Jong-Hoon (Fremont, CA); Kamath; Sitaram (San Jose, CA) Assignee: Hyundai Electronics America, Inc. (San Jose, CA) Appl. No.: 954248 Filed: October 20, 1997 .......... In general, with faster column cycle times (as in for example synchronous DRAM), and larger number of simultaneously active data buses (as in for example RAMBUS DRAM), the contribution of this charging and discharging of the data buses to power consumption becomes quite significant.