for those of you who dig wirbel, following is a lengthy update on GaAS, CMOS and SiGe (oh, and lest i forget, InP).
frankly, i can't bullshit you and say that i'd ever mixed myself up a tonic of Indium Phosphide. never heard of the stuff, but i'm certainly tempted.
anyone? bueller?
hey, bdzr: any chance that you or TD are headed to chi-town for the NFOEC?
enjoy,
-chris.
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Electronic Engineering Times
September 13, 1999, Issue: 1078
Section: News
Lucent, AMCC split on high-speed backbone trail
Loring Wirbel
ATLANTA - The weeks between NetWorld+Interop here and the National Fiber Optics Engineers Conference in Chicago on Sept. 27 will be filled with physical-layer semiconductor specialists staking out claims to multigigabit physical-layer functions that use a mix of CMOS, gallium arsenide and silicon germanium (SiGe) process technologies.
Lucent Microelectronics (Allentown, Pa.) and Applied Microcircuits Corp. (San Diego) will be off to the races with multiple offerings at N+I. Lucent is sticking with biCMOS process technologies for its current generation of OC-48 (2.5-Gbit/second) clock recovery and multiplexer parts, even as it prepares for a next-generation SiGe offering from its Orlando, Fla., fab. The company is insisting that its transceiver module strategy, which emphasizes combining several analog circuits with optoelectronic parts, is popular enough with OEMs to justify expanding the module program.
As icing on the cake, the digital broadband groups within Lucent are introducing the long-anticipated "SuperMapper," a complex transmux and TDM framer device, which can be interfaced to Lucent's TADM chip to create two-chip systems that can aggregate traffic from DS-0 (64-kbit) to multigigabit levels.
AMCC, meanwhile, is taking an approach that emphasizes SiGe as a primary driver for interfaces at OC-48 and OC-192 (10-Gbit) levels. AMCC is using IBM Microelectronics as a foundry as it prepares to bring up its own SiGe process, using a recipe licensed from IBM. Ken Prentiss, director of telecom marketing, said AMCC is ready to put the SiGe process up against any bipolar or gallium arsenide (GaAs) process in existence for offering lower power and better jitter specs. AMCC also can call upon new digital Sonet framing talents, thanks to its acquisition of Cimaron Communications Inc., and has a wealth of new Sonet processing introductions being readied this fall to go up against the likes of Lucent.
The established players in Sonet backbone transmission ICs are finding they need to take an end-to-end approach to the design of broadband access. Vitesse Semiconductor Inc. (Camarillo, Calif.), which has led in the development of several designs incorporating forward error correction, is making use of its submicron GaAs fab in Colorado, even as it outsources CMOS fabrication for data-link layer functions. And newcomers like Giga North America and Multilink Technologies Inc. are taking a lead in 10-Gbit designs, which the OC-48 leaders will have to address as the communications world heads into the NFOEC show at the end of the month.
Ken Brizel, strategic marketing director at the Lucent Microelectronics fabrics and optics group, said competitors have criticized their multichip transponder module for 2.5-Gbit dense wave-division multiplexing (DWDM) interfaces because it has not been shrunk to single-chip size. But in fact the form factor was so popular that Lucent is introducing a TransLight Sonet termination module, integrating 15 optical and electronic components in a module measuring 3.5 x 2.5 inches.
Designers can mix and match the optical functions available in the TransLight module, swapping out Fabry-Perot or distributed feedback lasers, PIN diode or APD optical receivers, and 1.3- or 1.5-micron single-mode optical interfaces in either short- or long-haul versions. By 2000, Lucent's turn to a chip-on-board multichip module process will allow the module to incorporate the TDAT "Detroit" framer chip as well as transceiver components.
For high-speed 2.5-Gbit designs, Lucent is making its first turn from earlier GaAs drivers and limiting amps, to higher-integration receiver and transmitter functions implemented in biCMOS. The TTRN012G5 is a 2.5-Gbit clock synthesis and multiplexer transmit component, while the companion TRCV012G5 device is a 2.5-Gbit receiver integrating limiting amp, clock and data recovery, and demultiplexing functions.
Peter Chadbourne, marketing manager for Sonet transmission at Lucent, said this is only the first step in a plan to mix four separate processes -- GaAs, biCMOS, SiGe and indium phosphide (InP) -- to cover a range of applications spanning 2.5 to 40 Gbits/s. By the end of the year, 10-Gbit GaAs parts will integrate drivers, limiting amps and transimpedance amps in one die. At the same time, Lucent will move to its first 10-Gbit SiGe parts, integrating clock synthesis and muxing in a transmit part and clock-data recovery and demuxing in a receive part.
By 2002, Chadbourne predicted, the SiGe process could move transmit and receive blocks to 40 Gbits/s, though the transimpedance and driver functions for 40-Gbit Sonet will have to be implemented in InP.
"Where we think we can win with the new biCMOS devices is in superior jitter performance," Chadbourne said. The devices also allow clockless data transfer, so that no clock is necessary to feed 16 data lines at low-voltage PECL interface levels, eliminating the need for FIFO or delay-line solutions in a line card. The biCMOS devices give Lucent an opportunity to serve 2.5-Gbit markets while bringing up its own home-grown SiGe layers, which can be added to the standard CMOS line in Orlando.
Lucent's digital CMOS strategy will take a big leap forward this week with the debut of SuperMapper, a single-chip monster for aggregating T1 and E1 voice and data traffic to Sonet transmission systems. The chip competes in part with multichannel framers, since it aggregates 28 T1/J1 or 21 E1 framers with an M13 multiplexer.
But the real leg up in integration, according to marketing manager Amit Banerjee, is the addition of virtual tributary and virtual circuit mappers, Sonet payload envelope mappers and performance monitors on the same die. The 456-pin, $300 device is intended to perform all aggregation for services intended to be mapped to a fiber-based transport, with a minimum DS-3 (45-Mbit) service in the outbound direction.
When the Super Mapper is interfaced to the TADM access chip, a two-chip set can map DS-0 signals all the way up to OC-12 Sonet pipes. Flexibility of access will be increased further next year, when Lucent offers an "Any Service Any Port" mapper that can be configured with up to 56 channels of high-level data-link control or ATM controllers.
SiGe all the way
AMCC is making SiGe the core of its access strategy, to a larger extent than anticipated. Prentiss said that "When we first announced our SiGe deals, we were talking about OC-192, but we always had it in mind that SiGe made the most sense for the bulk of OC-48 designs, as well." The exception is in digital analysis of a DWDM signal. AMCC is introducing one CMOS part for optical networks this week, the S3062, dedicated to performance monitoring and encode/decode functions for signals incorporating forward error correction.
The remaining two devices in the three-chip DWDM set, however, are SiGe: the S3066 clock/data recovery device and the S3067 mux/demux device with integrated FEC. AMCC worked with three OEM partners at developing these solutions. Only Vitesse Semiconductor to date has offered performance monitoring and in-system FEC, and Prentiss claimed AMCC would be able to offer power dissipation reduced by as much as half, as well as broader monitoring and reporting of FEC error conditions.
Outside of the FEC and performance-monitoring arena, AMCC also is introducing a SiGe clock-recovery and limiting-amp solution, the S3058. That device is a more integrated version of a SiGe clock and data-recovery device AMCC introduced last month, the S3056.
"It goes without saying that your jitter must meet ITU specs, but that's not enough, Prentiss said. The name of the game is additional margin now, particularly considering the fact that your optics are almost sure to add jitter."
AMCC also has designed a variety of crosspoint switches, useful in building scalable Sonet crossconnects for systems ranked as high as 40 Gbits/s. The new 17 x 17 S2018 switch, capable of meeting 3.2-Gbit/s speeds, will be followed by switch fabrics at 34 x 34 and 65 x 65 densities.
In the next few months, AMCC will rely more on two critical acquisitions and the design teams that came with the companies. The team from Ten Mountain Designs in Minneapolis will be responsible for designing mixed-signal interfaces for higher Sonet rates. Meanwhile, the Cimaron team will augment its Nile mapper for OC-12 Sonet/ATM and Amazon mapper for OC-48 packet-over-Sonet and ATM, with new devices meant to link closely to AMCC's own performance-monitoring and error-correction circuitry.
"The survivors in this market won't be experts just in transceivers, or just in mappers," Prentiss said. "You've got to have end-to-end transmission solutions.
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