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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Petz who wrote (69592)8/23/1999 3:17:00 AM
From: Process Boy  Read Replies (1) | Respond to of 1574270
 
Petz - <This is probably what was responsible for CuLaterMine delay of >=600 MHz parts. Probably solved by changing production steps to make "problem" traces skinnier + a layout change. Any comments?>

Yep. That wasn't the problem at all. I won't tell you what is was, but I will tell you what it wasn't, and it wasn't RC delayed interconnects or "crosstalk".

PB



To: Petz who wrote (69592)8/23/1999 3:27:00 AM
From: Pravin Kamdar  Read Replies (1) | Respond to of 1574270
 
Petz,

I really don't think you can make problem traces skinnier. They are already at minimum width, or if they are not, are at a width needed for whatever they are driving. If the traces are on different layers, you can translate one of them so they are not on top of each other. If they are on the same layer, you can increase the spacing between them. If they are on they same layer and you have copper, you can decrease their thickness (not width).

Pravin.



To: Petz who wrote (69592)8/23/1999 12:49:00 PM
From: Bill Jackson  Respond to of 1574270
 
Petz, Obviously it is not a fully known science, even for Intel. Does the culaternevermaker use the porous insulation for lower capacitance?
Bill