To: Jill who wrote (27430 ) 8/23/1999 11:14:00 AM From: unclewest Read Replies (2) | Respond to of 93625
i notice we have some new names on the thread this morning. dell and cpq will have rmbs workstations and pc's for sale next month. has everyone read dell's white paper on rmbs? unclewestdell.com clip... "Rambus Performance Issues Actual performance numbers for Rambus memory in a PC have not yet been publicly released, so this paper cannot offer a direct comparison between Rambus and other popular memory technologies. However, the factors that affect memory performance are well understood, and a discussion of how these factors affect Rambus is presented next. Other emerging PC memory technologies address the need for improved memory performance with higher clock rates and/or transfers on both edges of the clock (for data only). While these techniques are effective, they do not scale well. A PC 133 DDR memory system with a peak bandwidth of over 2 GB/sec may be available within months of the introduction of Rambus; however, the effective bandwidth will still be less than that of Rambus due to Rambus' superior pipelining and command handling. SDRAM efficiencies will be approximately 60 percent while Rambus accesses can be scheduled to reach up to 95-percent efficiency Scalability Because Rambus is a scalable memory architecture, it is reasonable to add channels to increase bandwidth and capacity or just add repeaters for more capacity. In comparison, SDRAM architectures are limited in frequency because of their bus width?as bus frequencies go up, timing margins become more difficult to meet, and it may be impractical to scale SDRAM beyond 133 MHz for main system memory. Rambus channels are also less costly to replicate than SDRAM, because a 33-signal interface must be replicated compared to 132 signals for SDRAM. The cost difference for replicating the two interfaces is significant Additional Control Registers Another benefit of Rambus is its ability to take advantage of the additional gates in the memory interface for tasks such as intelligent prefetch and intelligent management of power states. One possibility would be to use Rambus' additional bandwidth to prefetch and buffer data before it is requested. For example, when data is requested through an I/O port, the next sequential data could be prefetched and buffered on the assumption that I/O requests tend to be sequential. Other uses for these additional gates are possible."