To: Elmer who wrote (70035 ) 8/27/1999 11:02:00 AM From: Ali Chen Read Replies (1) | Respond to of 1572888
Elmer <shows a real lack of understanding of the obvious problems AMD has already demonstrated,> Yes, it's about yourself. You still did not get it, do you? Sure problems are obvious, but the cause is not, especially for you. You need to turn your brain by 90 degrees. Everything you write shows your lack of understanding. You say: "AMD has major problems with large die and added L2" In reality, AMD has made tremendous inroads in process/design technology to get K6 to 500MHz point. With new K7 microarchitecture, the pay-back is still unbelievable for some. You say: "Intel is the only company shipping product on .18u while AMD hasn't shown any ability to significantly manufacture K7s on .25u" In reality Intel 0.18 products did not get even to 500MHz yet while AMD is shipping Athlons on 0.25 um that are overclockable to 750MHz, see Tomshardware. You say: <Off die full speed L2 ain't gonna happen above 600MHz. It's unmanufactureable and untestable. It's on die L2 (which AMD can't manufacture) or it's off die at 1/2 core speed.> All 90-degree wrong again. Yes, 600MHz SRAM will not happen soon. But it does not matter, Fudd! With proper L2 design the 1/2 or 1/3 or even 1/4 speed for L2 does not impact performance significantly (on small-size workloads) while bigger caches vastly reduce miss rate on modern ever increasing workloads. On-die caches will never catch up with application demands because it is applications who drives decisions to increase caches, not opposite. The Ahlon flexible L2 cache design will allow to employ ANY off-shelf cache no matter how slow it is - still with performance benefits. And your P-III can't get above 600 exactly due to the lack of this flexibility - such a short-sighted design it is. Now, do you have more fudd for your short thoughts?