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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Elmer who wrote (70949)	9/3/1999 9:07:00 PM
From: Tenchusatsu	Respond to of 1575808

<Why would they add the die area for L2 if it offered no performance improvement?> Well, there's always Socketmine. Plus, I would guess that it's much easier to scale the frequency of an on-die cache than an off-chip one. Tenchusatsu

To: Elmer who wrote (70949)	9/3/1999 9:19:00 PM
From: kash johal	Read Replies (2) \| Respond to of 1575808

Elmer, Re:"Kash, if that were true then Intel wouldn't bother with Coppermine. Why would they add the die area for L2 if it offered no performance improvement? They would simply compact the PIII for .18u and be done with it." The reason is very simple........to reduce costs. It is much more expensive to build the module with external SRAM than the integrated chip at 0.18 micron. I would guess that Coppermines will cost $20-30 less than current PIII's. Basically coppermine is a CELERON with cache doubled and SSE and faster bus with some limited cahe control improvements. And yet u keep posting this BS that it will be much higher performance than a PIII and close to an AThlon. If Intel was serious about performance then willamette would have been out by now. In fact it is in such poor shape that they won't even discuss it at the Microprocessor forum. And the bottom line is that you know this and keep on spreading on the FUD. regards, Kash