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To: grok who wrote (6)	9/7/1999 2:26:00 PM
From: kash johal	Read Replies (1) \| Respond to of 271

Folks, Any thoughts on Mosys 1T SRAM. Nintendo will use it for Dolphin:Nintendo to use Mosys' 1-transistor SRAM. Seems like an ideal platform for low cost IA's and even PC's. By Peter Clarke and Yoshiko Hara EE Times (09/07/99, 10:19 a.m. EDT) LONDON ? So-called one-transistor SRAM technology developed by Mosys Inc. (Sunnyvale, Calif.) has gained a high-profile design win. It will be used by Nintendo Co. Ltd. (Kyoto, Japan) in its Dolphin game console, due to debut in fall 2000. At a consumer electronics and PC games exhibition here next week, Nintendo is to announce that it has licensed the 1T-SRAM technology from MoSys for use by ArtX Inc. (Palo Alto, Calif.) in a graphics processor being developed for the Dolphin. NEC Corp. will fabricate the chip using a 0.18-micron embedded-DRAM process. "This is a breakthrough for us-the first application in high-volume graphics to use SRAM rather than embedded DRAM,"said Mark Jones, vice president and general manager of intellectual property at Mosys. MoSys has already announced licensing agreements with chip makers TSMC, NEC and Analog Devices Inc., and Jones said other deals are in the pipeline. It has not yet been revealed how much embedded memory ArtX will put on its Nintendo graphics processor, but Mosys claims that up to 128 Mbits of 1T-SRAM can be embedded in logic devices. The Mosys memory cell has the same fundamental structure as a DRAM. It requires refresh and makes use of the same basic single-transistor-plus-capacitor structure as a DRAM cell. Transparent refresh But "to the users it looks like SRAM," Jones said. "What Mosys has done is create an SRAM-compatible cell block. Users don't see the refresh, and we can achieve SRAM access speed. What is more, you can build the 1T-SRAM in a standard CMOS process, which you can't do with DRAM." Some graphics-chip developers are eyeing embedded DRAM to improve bandwidth between the processing pipeline and memory, but Jones said they are stuck with DRAMs' relatively slow random-access times. The embedding of large SRAM blocks into a graphics processor should improve performance, resulting in more detailed graphics moving at higher frame rates. Meawhile, Nintendo Co. Ltd. said in Tokyo it will use ARM's 32-bit RISC core to power its next-generation portable game pad, Game Boy Advance, which will hit the Japanese market in August 2000. The company intends to propose a game world to be built on the communications capability of Game Boy Advance, which will offer performance comparable to current game consoles. Sharp Corp., which is supplying color LCDs for the current Game Boy Color, will again be the component supplier for the next generation. Nintendo plans to offer a communications adapter in April 2000 for Game Boy Color, the color version of current Game Boy. Linking the current Game Boy Color with a portable phone will enable users to play communications games on Game Boy. In August next year, Nintendo will introduce Game Boy Advance in Japan to provide stronger communications and Internet connectability through the adapter. Hiroshi Yamauchi, president of Nintendo, said, "The Japanese portable phone market is expected to reach 50 million units by the end of the year. The rapid increase of users will be a rich soil for a new communications-game software market to grow." He drew a line between current network games and communications games. He said that Nintendo intends to create a new game arena but would not disclose details. Game Boy Advance marks the first time a portable game pad has been powered by a 32-bit RISC CPU.

To: grok who wrote (6)	9/7/1999 2:39:00 PM
From: Dave B	Read Replies (1) \| Respond to of 271

KZ, Anyone understand the AL460GX Merced diagram that the Register posted. In the upper right it sez: "Dual Memory Ports; 4.2 GB/sec peak; 64 SDRAM DIMMS; 64 GB max." The chip set consists of a SAC address chip and a SDC data chip. Data from DIMMs moves at 266 MT/s so it must be 128 bits wide or else two 64b ports which must be what they mean by Dual Memory ports. Notice no Rambus anywhere. Old news. Check the Rambus thread (probably June/July timeframe, maybe earlier) for the discussion. The basic upshot of the discussion is that Merced was due out about a year before RDRAM was due out, so RDRAM was obviously not included in the design. As Merced slipped, the last thing they would have done would have been to change the memory interface to another new technology. They're trying to get it done, not continue to upgrade it (no creeping elegance!). Search for Merced and Rambus on the regular thread. You'll probably be able to find it. Dave