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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Charles R who wrote (71636)9/10/1999 9:39:00 AM
From: kapkan4u  Respond to of 1575422
 
Chuck, thread,

The Register has a link

inqst.com

to the article analyzing Intel's IDF Rambus benchmark. The article says that the benchmark is cooked. Here is the summary from the article:

Kap

DRAM Performance Analysis using Intel's Platform Test Program

Bert McComas - Sept 8 1999



At IDF last week, Intel released its long awaited Rambus Benchmark. A CD labeled "Platform Tests v1.1" was widely distributed to attendees at the conference, and was separately made available to product reviewers and members of the press. It was demonstrated in Pat Gelsinger's keynote address and in various other presentations.

This benchmark synthetically tests DRAM bandwidth and AGP bandwidth. Its goal is to highlight the performance advantages of Intel's Camino platform. I have spent a week with this program to figure out everything I can about it. Though there are many details to absorb, we can jump right to the bottom line. There are only a few big issues.

Is this Benchmark Effective?

No. Its broken. The bandwidth test in particular produces results that defy reason and logic - exceeding the theoretical peak burst bandwidth of DRAM in a number of cases. The AGP test is not necessarily broken, but it doesn?t seem too enlightening or valuable.

Why would Intel release it?

Intel needs a tool to market excess bandwidth, or rather 'Headroom'. When used on a few specific platforms, this test conveniently spits out results that support Intel's claims about the effective throughput of PC100 vs Rambus.

Can it still be used to evaluate performance?

Perhaps - under very narrow constraints. But its bandwidth measurements cannot be taken as literal - and thus cannot be used to compare dissimilarly configured systems. I will clarify later.

What does it show about chip set and DRAM performance?

After clearing away the confusion, it indicates a significant performance advantage for the VIA chip set compared to the BX. It is not as easy to reach any conclusions about Rambus.



To: Charles R who wrote (71636)9/10/1999 11:29:00 AM
From: Process Boy  Read Replies (1) | Respond to of 1575422
 
Charles - <P.S.: I took a quick look and see that it is only 0.18. Do you have the SRAM max speeds or schmoos for 0.25 or 0.35?>

Charles, I'll have to dig those up. I'll see what I can do.

One thing. This study was done close to a year ago. The current speed of this device may have improved at the parameters specified.

Now I see what you are trying to do, I think; equate SRAM test vehicle speed with Fmax on product? ?This may be tough. I don't know if I can specify things to that detail. however, the speeds certainly are an indication of the health of the process.

One would think that speed path issues on the product would be the only thing limiting comparable Fmax on Product, assuming the architecture can support high MHz.

PB



To: Charles R who wrote (71636)9/10/1999 2:47:00 PM
From: Yousef  Respond to of 1575422
 
Chuckles,

Re: "Do you have the SRAM max speeds or schmoos for 0.25 or 0.35?"

The .25um SRAM test development vehicle ran at 400-450Mhz with over 90%
bin yield. However, I don't know the max-frequency of that particular
SRAM. When Intel introduced their .18um process (at IEDM '97 ?), they said
that the SRAM was running at ~900Mhz. Hopefully this gives you (and the
"little screwdriver") some idea of how the .18um Intel process will scale.

Make It So,
Yousef