SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: grok who wrote (72575)9/20/1999 6:46:00 PM
From: Tony Viola  Read Replies (3) | Respond to of 1573213
 
KZ,

Smell the coffee, Tony. The signals switch at 800 MHz. Only the clocks switch at 400 MHz.

I did, Yuban. You have some. It's 400 MHz. Below from Rambus' website (not that well written either, note busoperating typo):

rambus.com

Its architecture is based on the electrical requirements of the Direct Rambus Channel, a
high-speed busoperating at a clock rate of 400MHz which enables a data
rate of 800MHz (data is clocked on both clock edges).


Oh, by the way, in your statement, it would be pretty hard for a 400 MHz clock to latch/capture 800 MHz data. Make that impossible, unless you're willing to throw away half the data.

Tony