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To: Bilow who wrote (136)9/28/1999 4:11:00 AM
From: Bilow  Read Replies (1) | Respond to of 271
 
Another likely future competitor both to embedded DRAM and Rambus, is stacked chips. In this technology, different chips are stacked together. With respect to DRAM, this allows the logic chips to have a different process than the memory chips. It also allows for larger pinouts on the memory chip, thereby increasing bandwidth, but without increasing PCB routing.

Sharp Stacks Chips In System Integration
offer the three-chip stacked CSP at a price similar to three single CSPs... volume production in August.

200-pin package with an 0.8-mm pitch as its first offering.

techweb.com
techweb.com

Paper-thin pack may bend limits for mobile gear
A maximum of eight chips can be stacked using the new package; such a configuration would measure roughly 1 mm in height.

Toshiba plans to sample a 1-Gbit SmartMedia card with four 256-Mbit flash chips in next year's first half.

techweb.com

Intel, Hitachi join Sharp's stacked chip-scale group
The standard includes 64-pin and 72-pin specifications, each with pin pitch of 0.8 mm.
techweb.com

-- Carl



To: Bilow who wrote (136)9/28/1999 10:09:00 AM
From: grok  Read Replies (1) | Respond to of 271
 
RE: <They will require underclocking of the RDRAM. Even now, I'll bet they have tried this and it worked for them, they just don't want to give the performance hit, especially when the technology gives so few benefits already.>

I've heard that Dell's problems were at 700 MHz. Can 600 MHz be far away?

I suppose that all the testing at Dell was done with Rdrams from the same vendor, probably Samsung. I wonder what happens when the day comes that people start adding memory in the field with RIMMs from various vendors?