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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: John Walliker who wrote (31032)	9/28/1999 12:15:00 PM
From: RetiredNow	Respond to of 93625

Looks like a bounce today. I can't believe people are actually buying this thing right now. I knew we had manic gamblers out there, but this proves it.

To: John Walliker who wrote (31032)	9/28/1999 12:54:00 PM
From: Bilow	Read Replies (1) \| Respond to of 93625

Hi John Walliker; Re those metastability errors... Your metastability calculations were done under the assumption that only a metastability hit would cause a system error. (I'm not sure that the calculation are correct even assuming this.) But that is not the assumption you should make. Besides, the calculations for probability of detection should be adjusted. Typically, test machines are run for hours, so even if there is only a 0.000000000001% chance of a problem, the problem will very likely be detected, if the problem is being looked for on a 16-bit wide bus at a rate of near 800 million opportunities per second. Incidentally, it is these rare problems that are the hard ones to fix. I have no doubt that it has been rare problems that have kept this delivery delayed. If the data misses the clock by enough to avoid a metastability, it still misses the clock. This causes a bit error 100% of the time, and will be detected, if the program checks the data (or if it crashes because of the bad bit.) In particular, no one is out there designing memory systems where the data gets sampled with metastability (unless they are oversampling, and discarding some samples). Those other systems, the ones with shorter busses that don't go through RIMM modules are going to be a lot more robust. I guess that what you are suggesting is that maybe the controller is unable to adjust to RIMM modules that are too many nanoseconds delayed. My guess is that the designers knew how many nanoseconds the outside RDRAMs were away. So the problem is more likely to be loss of timing margin associated with the additional random timing jitter of far away drivers, which is much harder to predict. I wish I knew whether the problem was a read or a write, they really are not giving out much technical information. If I am right, they are going to have to derate the timing in order to get enough timing margin to ship. So -800 parts will end up running at 700MHz, the 700MHz parts at 600MHz. -- Carl