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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: THE WATSONYOUTH who wrote (73406)	9/29/1999 12:16:00 AM
From: Petz	Read Replies (1) \| Respond to of 1573415

WATSONYOUTH, thanks for your help on guard bands in spec-ing processor speeds. I expect that Athlon overclocks better than the normal guard band % if a very good cooling solution is implemented. Heat, not switching speed is the limiting factor with the Athlon; if the temp can be kept below 50 degC, the switching performance improves also. Petz

To: THE WATSONYOUTH who wrote (73406)	9/29/1999 7:04:00 AM
From: Dan3	Read Replies (2) \| Respond to of 1573415

Re: typical guard band on these processors is 5% to 10%... Thanks for your post, I know nothing in this area. If temp is taken into account, is another 5 or 10% added on? So if a process is expected to yield 800MHZ CPUs at 70C, then the chips should run (briefly, at least) at 900 before errors occurred and (at least some of them) should run at 1000MHZ at 45C before errors occurred? Or does the 5 to 10% take into account temperature? Thanks, Dan

To: THE WATSONYOUTH who wrote (73406)	9/29/1999 11:43:00 AM
From: Elmer	Read Replies (1) \| Respond to of 1573415

Re: "In my experience, the typical guard band on these processors is 5% to 10%. " It would seem far simplier to me to guardband the VCC rather than the frequency, and it would accomplish the same thing. In an attempt to keep test time at a minimum, the question would be, which requires the least time? A voltage switch or a reload of the timing registers? With the constant concern of violating tester timing restrictions, having multiple timing templates could be a major resource consuming task. Furthermore, going to 800Meg or 1Gig core speed would require ultra high speeds on the cache bus even at only 1/2 core speeds. Extremely difficult to test in a production environment. All this points out the enormous value of low defect density, allowing large on-die caches. No need to test the BSB because there isn't any. Much lower tester speeds and much lower pin count thus much lower capitol costs. EP