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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Petz who wrote (75488)10/14/1999 4:30:00 AM
From: Tenchusatsu  Read Replies (1) | Respond to of 1572866
 
Petz, you're right about Athlon's potential with on-die L2 cache. AMD may have one heck of a time manufacturing it, though, since nothing less than 512K of L2 cache will do thanks to that 128K L1 cache. Redundant columns can help with the yield issues, but the larger die sure isn't going to help volume.

Tenchusatsu



To: Petz who wrote (75488)10/14/1999 9:36:00 AM
From: vince doran  Read Replies (2) | Respond to of 1572866
 
Petz, Chuck, Kash, Ten, PB, Scumbria if you're out there - RE: On-die L2 for Athlon.

How doable do you think that is? Do you think it could be done by Q2/2000?

frostyfox.com has put up some SIS benchs of FPU Whet (tie with 800/133 CUmine) and CPU Dry (20% > CUmine).

Vince



To: Petz who wrote (75488)10/14/1999 12:18:00 PM
From: Paul Engel  Read Replies (1) | Respond to of 1572866
 
Petz - re: "design clock for clock does not worry me because:
1. AMD's L2 throughput and latency can certainly be improved once the L2 moves on-chip (Athlon 0.18)"

The L2 cache will have to be at least 512K (4xL1 cache) to be useful - and guess what adding 25 million transistors (512K L2 cache) is going to do to the AthFlop die size ?

Can you say GET MUCH BIGGER?

You can say Sayonara to the cost savings in going to the 0.18 micron process.

Paul


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