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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Charles R who wrote (75831)	10/18/1999 2:02:00 AM
From: Process Boy	Respond to of 1571871

Charles - <Is this a theoretical statement or has it been tested in the fab or is this something that you say based on AMD/IBM's experience from local interconnect. (I guess AMD travails with the K6 may indicate that there may be something to the "yield loss mechanism" angle though K6's problems itself were more design related than process related.)> The reasoning for my statements are a combination of all the above. I don't dispute anything you say in the above paragraph. Since I have never extensively worked with local interconnect, I am coming from it from a mainly theoretical standpoint. <Any speculation on why AMD may have found this desirable or necessary?> I would guess a combination of device (transistor) design characteristics and overall circuit design considerations facilitated M0 at MOT, AMD, and IBM, to name a few. Die size is another consideration, as M0 facilitates higher cell densities, and thus smaller die size as opposed to not using M0. <If my memory serves me right this decision was made when AMD moved Nexgen's products from IBM's fab to AMD's fab (Did IBM have a 4LM and AMD 3LM and AMD used local interconnect to make for the missing metal?)> I don't have the background to comment on this. I bet WATSONYOUTH does though. PB