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To: Jeffry K. Smith who wrote (32468)	10/21/1999 9:29:00 AM
From: John Walliker	Read Replies (1) \| Respond to of 93625

Jeffry, I was suggesting that certain combinations of chip accesses must be avoided for reliable operation. Should they occur, a wait state of 1.25 or 2.5ns would prevent the problem. It might be that a bug in the 820 chipset fails to prevent one of these forbidden combinations which is only applicable when memory chips are more than a certain distance from the controller. The 840 motherboards only have two RIMMs per channel, so this critical distance is never reached. John