Old News but still interesting!
ELECTRONIC DESIGN
May 31, 1999
Return to May 31, 1999 Issue Table of Contents
--------------------------------------------------------------------------------
Digital Design
Exploring the world of digital logic, memory, and microprocessors
Competing DRAM Architectures Push Performance And Density Limits
Two Advanced DRAM Architectures--The Synchronous DRAM And The Direct Rambus DRAM--Battle It Out For System Sockets.
Dave Bursky
When system designers turn to DRAMs to fill their primary memory needs, the main criteria for selecting a technology include performance, density, and low cost. DRAM costs, which are the overriding factor, are often directly related to the chip area and the volume in which they're manufactured. The company with the smallest chip area usually can offer the most cost-effective product at the chip level. Still, a cheaper chip doesn't always translate into a cheaper system, since all system-design aspects must be factored into the cost equation.
Art Courtesy: Samsung Semiconductor Inc.
In many cases, a smaller chip yields better leading-edge performance because it can be clocked at higher speeds. Memory architecture, though, can also play an important role in chip and system performance as new architectures, such as the Direct Rambus DRAM, start to compete with the SDRAM. Today, the SDRAM is the dominant mainstream memory. And, for non-PC applications that require gigabytes of memory, it will probably remain the choice for many years to come.
Challenging SDRAM dominance in the PC arena is the Direct RDRAM, which is a second-generation version of the original Rambus DRAM. The Direct RDRAM's enhanced architecture eliminates the major shortcoming of the earlier device--the high latency associated with the initial access. Actually developed in conjunction with Intel Corp., Santa Clara, Calif., Direct RDRAMs are part of the general PC-99 system specification used as a roadmap by all PC manufacturers.
Direct-RDRAM latency times are now comparable to those of SDRAMs. So, they don't degrade system performance during random accesses. First-generation RDRAMs had a significant initial-access overhead. As a result, they didn't perform well in memory subsystems dominated by random rather than sequential accesses.
Furthermore, Direct RDRAMs include a 16-bit- wide memory interface, rather than the original RDRAM's byte-wide interface. That by itself doubles the data-transfer bandwidth versus the previous chip. When operated with the 600- or 800-MHz specified clock frequency, Direct RDRAMs deliver data at 1.2 or 1.6 Gbytes/s, respectively. (Actually, the clock is 300 or 400 MHz. But both the rising and falling edges are used for data transfers, so the memory appears to be operating at 600 or 800 MHz.)
Intel and other PC chip-set suppliers want to make it easy to use Direct RDRAMs. Consequently, the Rambus ASIC (RAC) cell containing the word-serial memory interface will be embedded in next-generation motherboard chip sets. (The RAC is also a block of intellectual property (IP) that Rambus licenses to ASIC manufacturers or system designers.) Initially expected by mid-1999, the "Camino" chip set has been delayed by Intel until later this year. This will limit the initial market for the first 64/72-Mbit implementations of Direct RDRAMs.
The market will be limited because second-generation 128/144-Mbit Direct RDRAMs are already coming out of the ovens. Samples are starting to appear. And, at least a half-dozen companies--Hitachi, Hyundai, LG Semicon, Micron, NEC, Samsung, Toshiba, and others--expect to turn on production in the first half of 2000. NEC has already started sampling an 800-MHz 128-Mbit Direct RDRAM, the æPD488448FB, which it expects to sell for $85 apiece in sample quantities.
Internally organized as 256 kwords by 16 bits by 32 banks, the chip operates from a 2.5-V supply and clocks at 400 MHz (800-MHz data-transfer rate). It's housed in a proprietary package that NEC refers to as a die-dimension ball-grid array (similar to what's loosely referred to as a chip-scale package). The package was developed to minimize signal noise and lead inductance. NEC also plans to use the chips on a family of Rambus interface memory modules (RIMMs). Initially, NEC will offer a 184-pin 128-Mbyte module. The RIMM is an industry-standard module format that is mechanically the same size as the SDRAM DIMM. It can hold a maximum of 16 RDRAMs.
Samsung expects to complete the design of its 256-Mbit Direct RDRAM this quarter. With sampling expected in the second half of 2000, that could well put the company in the lead for offering the highest-capacity RDRAMs and RDRAM modules in the industry. There will also be a large contingent of third-party module suppliers. Companies such as Cadmintonn Corp., Irvine, Calif.; Kingston Technology Co., Fountain Valley, Calif.; and Smart Modular Technologies Inc., Fremont, Calif., will offer RIMMs of various capacities.
The delay in getting motherboard chip sets ready for Direct RDRAMs, though, leaves the window open for continued use of the PC-100 SDRAMs and the upgraded PC-133 implementation. These latest generations of SDRAMs have found widespread acceptance targeting the PC industry. Yet due to the expectation that the Direct RDRAMs would be the memory of choice by mid-1999, many PC designers didn't push for motherboard chip sets that support the PC-133 SDRAM speed grade. Only a few suppliers--Acer Labs Inc., San Jose, Calif.; OPTi Inc., Milpitas, Calif.; and Via Technologies Inc., San Jose, Calif., for example--are developing PC-133-capable chip sets. This lack of chip sets may also limit the use of PC-133.
But there's more to the industry than just PCs. The same memories will find homes in many other types of systems, from servers to embedded industrial computers to network hardware (bridges, routers, ATM systems, PBXs, etc.). IP providers are starting to offer independent SDRAM controllers, implemented as part of an ASIC, for these systems. For instance, Integrated Intellectual Property Inc., Santa Clara, Calif., recently released its SuperSDRAMCore. It can be used by system-on-a-chip designs to build 100-MHz control interfaces. Such IP blocks can also be implemented on the latest generation of FPGAs or CPLDs.
As SDRAMs have taken over the mainstream, they've somewhat outmoded the traditional asynchronous DRAM architectures employing fast- page-mode and extended-data-out access modes. But it will be a few more years before they fade completely. Plus, the lower cost of SDRAMs versus specialty synchronous graphics DRAMs has pushed SGRAM out of many cost-sensitive graphics subsystems with a minimal impact on graphics performance.
Four generations of SDRAMs are currently in various stages of availability. Today's workhorses are 16-Mbit devices. But 64-Mbit chips are already coming on strong for mainstream designs that need high-capacity memory modules. A number of DRAM suppliers are starting widespread sampling of 128-Mbit devices. These 128-Mbit chips serve as a stopgap hedge on the process technology needed to manufacture 256-Mbit memories, which are available only in limited engineering samples. Samsung, however, has claimed the lead in shipping mass-produced 256-Mbit chips fabricated on a 0.18-æm process.
In the DRAM industry, 128-Mbit devices are unusual, since memory-density increases have traditionally jumped by four times for each new generation. But memory designers found that on their initial 256-Mbit prototypes, internal bit-line capacitance loading slowed down 256-Mbit chips. Furthermore, the lack of a process with features small enough to implement a cost-effective chip opened up the window for a 128-Mbit option. With 128-Mbit chips, memory modules with capacities of 512 Mbytes can be built with 32 chips. For memory-intensive systems, such as workstations and servers, these modules hold the key to higher-than-ever performance.
Bosco Sun, president of Cadmintonn Corp., points out one issue that may not be obvious in positioning SDRAMs and Direct RDRAMs. In RDRAM systems, a RAC interface can only drive up to 32 RDRAMs. For 64-Mbit Direct RDRAMs, that would limit the memory on one RAC to 256 Mbytes. When 128/144-Mbit devices are used, one RAC can handle 512 Mbytes.
Count Up The RACs
The motherboard chip set in a PC would typically contain a single RAC interface and up to three sockets for the RIMMs. A workstation's motherboard logic might contain two RACs, improving bandwidth and doubling memory capacity. Sun notes, though, that effective RDRAM bandwidth versus SDRAMs is hard to figure out. SDRAMs only have four memory banks per module, while multiple bank accesses can occur simultaneously on Rambus chips. A single RDRAM module could provide up to 256 banks (16 chips by 16 banks per chip).
Due to various signal-loading constraints to meet guaranteed performance levels, a RIMM can hold a maximum of 16 Direct RDRAMs (128 Mbytes using 64-Mbit devices). A RAC can only drive a maximum of 32 chips, though, so only two fully populated RIMMs can be plugged in (or three if the RIMMs aren't fully populated--two 64-Mbyte modules and one 128-Mbyte module, for instance). A "dummy" RIMM must be inserted into any empty RIMM connector to maintain clock-signal continuity.
Some designers see the RAC's "self-limiting" memory capacity as a way to segment the market between SDRAMs and Direct RDRAMs. Systems that require many gigabytes of memory could afford to use lower-cost SDRAMs and various interleaving schemes to improve performance. Meanwhile, systems that might require just one or two gigabytes could use Direct RDRAMs.
RDRAM systems, though, can also be expanded. They would just have to use multiple RACs, albeit with the additional overhead which that entails. Multiple RACs can be integrated onto a single chip for systems like this. In a proposed system implementation, Rambus designers envision an ASIC with eight RACs that could provide a system aggregate bandwidth of 12.8 Gbytes/s. If 256-Mbit RDRAMs were employed, it would have an addressing capability of 8 Gbytes (Fig. 1).
1. Multiple Rambus ASIC cores (RACs) can be integrated on a system memory controller to boost memory bandwidth and address capacity. In this example, eight RACs provide a total bandwidth of 12.8 Gbytes/s and a storage capacity of 8 Gbytes (using 256-Mbit Direct RDRAMs).
To be useful in the PC industry, SDRAMs must be able to meet PC-133 and PC-100 system speed specifications. And to do that, memory designers have moved to advanced processes that employ 0.20- to 0.25-æm minimum features. For still faster devices expected later this year and next year, chips will require minimum features that range between 0.15 and 0.18 æm.
The standard SDRAM, however, won't be able to achieve much higher data rates. At 133 MHz, for example, a 16-bit-wide memory chip will only be able to deliver a peak throughput of 266 Mbytes/s. So, a 64-bit-wide memory subsystem composed of four chips can only deliver four times that value, or just over 1 Gbyte/s. With various overheads impacting throughput, the actual data throughput of such a 64-bit memory subsystem might drop to between 600 and 800 Mbytes/s, depending on the mix of reads and writes.
Since it would be difficult to push the clock speed much faster--most companies project that the top clock speed for the standard SDRAM will be about 150 to 170 MHz--designers must find another way to boost SDRAM performance. Today's fastest SDRAMs are the 256-Mbit devices recently revealed by Samsung. They can operate at bus speeds of 167 MHz when powered by a 3.3-V supply, or 143 MHz from a 2.5-V supply. Although such speeds will push performance up to 334 Mbytes/s for a 16-bit-wide memory chip, systems are starting to demand still faster data-transfer rates.
One way to achieve higher data rates, known as the double-data-rate (DDR) SDRAM, leverages a scheme in DRAMs first used by Rambus in its original RDRAM--transferring data on both the rising and falling edges of the clock signal. Such an approach can theoretically double the effective data-transfer rate, allowing a DDR SDRAM to deliver a peak throughput of 286 Mtransfers/s (572 Mbytes/s for a 16-bit memory) when clocked at 143 MHz.
DDR memories are appearing with densities of 64, 128, and 256 Mbits, with most companies concentrating on delivering 128-Mbit devices. Micron, however, has already released a 64-Mbit DDR SDRAM organized as both 16 Mwords by 4 bits and 8 Mwords by 8 bits. The memories can operate at clock speeds of 100, 133, or 143 MHz. That allows the byte-wide version to deliver a top data-transfer rate of 286 Mbytes/s, which translates to about 2 Gbytes/s for a 64-bit-wide memory subsystem.
For the moment, the memory technology is ahead of the applications. There are few system logic chips available that support the DDR interface. And, no major systems manufacturers have released specific plans to use such memories in their systems. Still, Micron is planning for the long term. It expects to support 128-, 256-, and 512-Mbit versions in the same basic 66-lead TSOP and a future BGA package.
Samsung is also expecting the technology to pick up momentum. It has already developed a 128-Mbit DDR SDRAM that can be organized as either 16 Mwords by 8 bits or 32 Mwords by 4 bits (Fig. 2). The chips employ a bidirectional data strobe and can transfer data at rates up to 266 Mbits/pin at 133 MHz. In keeping with the generic specification for JEDEC-compatible DDR SDRAMs, the memories offer programmable burst lengths, programmable latencies, and both auto- and self-refresh features.
2. The first 128-Mbit double-data-rate SDRAM, Samsung's KM48L(H)16031BT, is internally configured as four banks of 2 Mwords by 16 bits. Special on-chip logic extracts the 8-bit words during reads and concatenates two 8-bit words for a write.
The traditional DRAM architectures in use over the last decade that employ page-mode or extended-data-out access schemes have run out of steam. Due to their outdated architectures, they're already fading away. But other approaches developed in the last few years are providing fresh ideas and much higher performance levels.
Most of them, though, haven't achieved much more than market-niche status. Some of these include the SyncLink DRAM fostered by the SLDRAM Consortium (http://www.sldram.com), the multibank DRAM developed by Mosys, and the cache-DRAM from Enhanced Memory Systems. There's also the virtual-channel DRAM developed by NEC and the fast-column direct-addressed DRAM crafted by Fujitsu.
The SyncLink approach showed a lot of promise, and the consortium even fabricated the first test design to demonstrate proof of concept. But it has, for the most part, been passed over by the industry. All won't be lost, though. Many of the concepts used to implement the SLDRAM will be used to help improve second-generation DDR SDRAMs, which are just now being defined by DRAM manufacturers.
One promising scheme that could enhance the performance of SDRAM systems or even RDRAM systems is the virtual-channel architecture defined by NEC. In this approach, some additional logic is required in the system controller to keep track of the virtual windows opened in the memory address space. Multiple windows can be opened simultaneously. This allows several data accesses to appear to be done in parallel. It also speeds memory-subsystem performance. NEC has licensed the virtual-channel technology to a few companies. By late 1999, several VC-enhanced memory subsystems should start appearing.
With performance comparable to PC-100 SDRAM systems, cache-enhanced DRAMs from Enhanced Memory Systems use the internal sense amplifiers like a temporary cache. As a result, they can deliver data at rates comparable to SDRAMs, but without all of the overhead associated with them.
The multibank DRAM architecture fostered by Mosys raised a number of eyebrows when it was unveiled as a high-performance memory interface. Unfortunately, the limited density and high chip overhead associated with the approach has relegated the MDRAM to niche status.
Mosys has been able to leverage the architecture and employ it to create a family of SRAM-like memories. They're based on single-transistor DRAM memory cells. Yet they deliver short access times like SRAMs. The company has licensed the technology for the 1T-SRAM to NEC and Analog Devices Inc., Norwood, Mass., as well as to the large foundry, Taiwan Semiconductor Manufacturing Co. Ltd., Hsinchu, Taiwan, R.O.C.
Rather than use a multiplexed address to access the memory, the FCDRAM developed by Fujitsu simplifies the memory interface. Since addresses aren't multiplexed, the memory appears to operate much like an SRAM. It can also be accessed very rapidly. But system designers haven't yet climbed on board this method, due to the higher pin-count associated with the approach, as well as the lack of multiple sources for the memory.
The choices now offered by DRAM manufacturers allow system performance and cost to be optimized based on the memory-subsystem architecture. And, although commercially available SDRAMs now top out at 256 Mbits, several companies have demonstrated functional prototypes of double-data-rate 1-Gbit SDRAMs.
Such chips, fabricated with 0.14-æm design rules and pipelined data paths, will be able to deliver data at yet higher rates. Samsung, for instance, demonstrated a data rate of 333 Mtransfers/s at last February's IEEE International Solid-State Circuits Conference. NEC and IBM/Siemens also presented details of 1-Gbit DDR implementations at the conference. These memories will allow system designers to build even higher-performance systems in the next few years.
--------------------------------------------------------------------------------
Major DRAM Suppliers
Alliance Semiconductor Corp.
(408) 383-4900
alliancesemi.com
Enhanced Memory Systems Inc.
(719) 481-7003
edram.com
Etron Technology Inc.
+886 3-578-2345
etron.com.tw
For Etron in the U.S., Contact:
Caltron Technology Inc.
(408) 987-2255
Fujitsu Microelectronics Inc.
(408) 922-9000
fujitsumicro.com
Hitachi Semiconductor (America) Inc.
(408) 232-3701
hitachi.com
Hyundai Electronics America
(408) 232-8000
hea.com
IBM Microelectronics Inc.
(800) 426-3333
chips.ibm.com
LG Semicon America Inc.
(408) 432-1331
lgsemicon.com
Micron Technology Inc.
(208) 368-3900
micron.com
Mitsubishi Electronics America Inc.
(408) 730-5900
mitsubishichips.com
Mosaid Technologies Inc.
(613) 836-3134
mosaid.com
Mosel-Vitelic Corp.
(408) 433-6000
moselvitelic.com
Mosys Inc.
(408) 731-1826
mosys.com
Motorola Inc.
(512) 928-6000
motorola.sps.com
NEC Electronics Corp.
(408) 588-6000
el.nec.com
Oki Semiconductor
(408) 720-1900
okisemi.com
Panasonic Industrial Co.
(201) 348-7000
panasonic.com
Rambus Corp.
(650) 903-3800
rambus.com
Samsung Semiconductor Inc.
(408) 954-7000
sec.samsung.com
Siemens Microelectronics Inc.
(408) 501-6000
smi.siemens.com
Texas Instruments Inc.
(see Micron)
Toshiba America Electronic Components Inc.
(714) 455-2000
toshiba.com
Vanguard International Semiconductor Ltd.
+886 3 577-0355
vis.com.tw
Winbond Electronics Corp. (America)
(408) 943-6666
winbond.com
|
