SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Scumbria who wrote (79862)11/14/1999 2:29:00 PM
From: Bilow  Read Replies (1) | Respond to of 1579777
 
Hi Scumbria; I really doubt that they've got a hold violation in the Athlon. Your statement "A mature design will tend to increase frequency with increased voltage, across the reasonable operating range of the part." is correct, but the Athlon is a special case. It uses an amount of current that I find amazing just to read it in a data sheet. 45 amps.

The .25u Athlon is not a "mature design". The architecture was designed for a .18u process. Putting it into .25u meant excessive power consumption, more than the package could get rid of. Thus the parts are being run derated. Their actual min clock period is nowhere near what the .25u parts are getting clocked at.

It is well known that the Athlon requires particularly powerful power supplies. But the Athlon does not use any voltage that comes from the system power supply, instead, there is a voltage converter on the motherboard. The current and power limits of this voltage converter are also current and power limits on the Athlon.

There are therefore three possible constraints to the ability to burn watts in an Athlon: (1) The package's thermal impedance, and the need to keep die temperature reasonable. (2) The mother board voltage converter's ability to provide power to the chip. (3) The system power supply's ability to provide power to the motherboard.

It is well known, (and noted on the AMD web site), that the second two of the above are more important design issues (for the system integrator), than is usual. My guess is that it is these issues that caused that voltage to have to tweaked lower. These will disappear in the .18u parts, not because of the elimination of a race condition, but because of the elimination of a near over power consumption issue.

The equation I always use to approximate propagation delay with respect to temperature (in CMOS), is simply scaling with the absolute temperature (i.e. degrees Kelvin). Scaling in voltage is roughly proportional to the voltage.

Current requirements scale as the product of the voltage and the frequency, while power consumption scales as V^2 * F. This V^2 * F is why the Athlon is so power consumption limited, and why earlier overclockers had to cut the voltage down.

Their ability to run the system on a reduced power supply is also an indication of good margins in the chip.

You wrote: "When a lower voltage produces a higher operating frequency, that is indicative of a Vbox." While this is true, the above provides an alternative explanation. If the original Athlons did suffer from some sort of race condition that prevented hot clocking, it would have been quite likely to occur at low temperature as well as high voltage. Since AMD itself supports the Kryotech coolers, it is pretty obvious to me that the Athlong doesn't have any such race condition.

-- Carl

P.S. As a designer, it seems to me that technicians are always accusing "broken" systems of having race conditions. This is quite insulting to the designers, who are generally kind of sensitive about this sort of thing. (It is also very convenient for the technicians, as then they get to quit looking for the solder blob that is typically the real cause of the problem.) I think that the data that is available is readily interpretable as an engineering constraint having to do with power consumption, rather than a design issue, and that the existence of highly over clocked Athlons for many months indicates a chip with no such problems.



To: Scumbria who wrote (79862)11/14/1999 3:07:00 PM
From: Pravin Kamdar  Read Replies (1) | Respond to of 1579777
 
Scumbria and Carl,

Do you guys have any feeling for whether or not the latency lowering L2 cache improvements that Intel made to the Coppermine are patented by Intel such that AMD could not use a similar approach when they add L2 to the Athlon? Or, was it a simple matter of widening the bus to the cache?

Pravin.