"Lucent, I'd like 1000 of your newest transistors. . .Where are they? What do you mean, 'they're in my hand?'"
Revolutionary Transistor Design From Lucent's Bell Labs May Turn Silicon World On End
MURRAY HILL, N.J.--(BUSINESS WIRE)--Nov. 15, 1999--
EDITOR'S NOTE: For additional information about the Bell Labs vertical
transistor and also color graphics, please go to
www.bell-labs.com
Using a revolutionary design, researchers at Lucent Technologies' (NYSE: LU) Bell Labs have produced the world's smallest transistor with equipment available in today's manufacturing facilities. This new design may help silicon chips continue their march toward smaller and smaller dimensions, and it has the potential added benefit of nearly doubling the processing speeds of some chips.
The 50-nanometer transistor - roughly 2,000 times smaller than the width of a human hair - is known as a "vertical" transistor because all of its components are built on top of a silicon wafer and its current flows vertically. In today's conventional transistors, which typically measure 180 nanometers, the current flows horizontally and the transistors are formed within the wafer itself.
Another key difference is that a conventional transistor has only one "gate," which switches current on and off in a transistor, whereas the Bell Labs vertical transistor resembles a rectangular block with a "gate" on each of two opposing sides. As a result, the vertical transistor could nearly double the processing speeds of some silicon chips.
"Our vertical transistor eventually could supersede the conventional transistor, which many experts in the semiconductor industry anticipate will hit a brick wall within the next 10 years," said lead Bell Labs researcher Jack Hergenrother. Semiconductor companies now use light to pattern features on silicon chips. However, as transistors continue to shrink in size, most experts agree that light eventually will be unable to produce the smaller features required, especially the gates. In addition, there's considerable variation in gate size when the light approach is used, and chips must be designed to tolerate this variation, which reduces overall chip performance.
The vertical transistor approach solves these problems by using the thickness of a precisely controlled layer of material, rather than light, to set the gate size. The technology for creating extremely thin, uniform and reproducible layers of material is well developed in the semiconductor industry.
"Suppose you have a can of paint and a big paintbrush, and you're asked to paint the thinnest possible line," Hergenrother said. "If you just tried to paint the line freehand, that would be similar to the light approach. However, if you paint a flat surface, cut it vertically and look at it on edge, you will see a line that's as thin as the layer of paint. A similar principle is used in our transistor to produce the smallest gates ever made with the control that industry requires."
So far, Hergenrother, Don Monroe and their colleagues have developed a vertical transistor with a 50-nanometer gate. Their design, however, should be capable of producing gates less than 30 nanometers. The vertical transistor design also may help forestall another challenge faced when making smaller transistors: the ever shrinking insulating layer. This layer lies between the transistor's gate and the channel through which current flows, thus preventing a short circuit.
For many years, the insulating layers in conventional transistors have been shrunk dramatically to increase the amount of current that transistors can carry. However, these layers will soon be so thin that electrons can sneak through them, which wastes power and causes the chips to break down prematurely. Many scientists believe that this will be the end of the road for the conventional transistor. As a result, the semiconductor industry is trying to find alternative materials for the insulating layer, instead of today's silicon dioxide.
A major obstacle is that most potential replacements are sensitive to the high temperatures used in the semiconductor manufacturing process. The vertical transistor approach eliminates that problem because the gate and insulating layer are applied last in the manufacturing process, after all the high-temperature steps are completed.
"This groundbreaking research provides new opportunities for integrated circuit miniaturization and performance enhancement," said Mark Pinto, chief technical officer of Lucent's Microelectronics Group. "Recently, there has been much concern that the semiconductor industry will soon encounter fundamental limits to how small and fast we can make transistors. This research clearly provides new ways to tackle these challenges."
Although many researchers have tried to build vertical transistors during the last 25 years, the Bell Labs approach has several advantages over previous designs; it can accommodate ultra-thin insulating layers, and the channel and gate are closely aligned. Because the Bell Labs vertical transistor provides a solid foundation, it may be possible to add additional layers of transistors to silicon chips, resulting in so-called high-rise chips -- one of the holy grails of semiconductor manufacturing.
"This is the best demonstration of vertical transistor technology to date, and it is an example of the innovative spirit that flourishes at Bell Labs," said Dimitri Antoniadis, professor of electrical engineering at the Massachusetts Institute of Technology.
The Bell Labs researchers will present their results at December's International Electron Devices Meeting in Washington. Next February, at the International Solid-State Circuits Conference in San Francisco, the researchers will discuss how the vertical transistor could be used in complete integrated circuits and their expected performance.
Lucent Technologies, headquartered in Murray Hill, N.J., designs, builds and delivers a wide range of public and private networks, communications systems and software, data networking systems, business telephone systems and microelectronics components. Bell Labs is the research and development arm for the company. For more information on Lucent Technologies, visit the company's web site at lucent.com or the Bell Labs web site at bell-labs.com. Steve Eisenberg Media Relations Manager Bell Labs Lucent Technologies Room 3C-418 600 Mountain Avenue Murray Hill, NJ 07974 908 582-7474 908 582-6033 fax
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