SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Scumbria who wrote (80194)11/17/1999 12:41:00 AM
From: Elmer  Respond to of 1570548
 
Re: "Not necessarily. L2 caches are designed so that portions can be individually disabled, to minimize die loss from defects."

We know. It's called the K6-2+

EP



To: Scumbria who wrote (80194)11/17/1999 12:41:00 AM
From: Jim McMannis  Read Replies (1) | Respond to of 1570548
 
RE:"Not necessarily. L2 caches are designed so that portions can be
individually disabled, to minimize die loss from defects."...
Originally I thought this is where AMD would get the K6-2+, 128k L2...
Maybe Intel is stockpiling some disabled Floppermines as Celeron Floppermines w/128k L2 in die? <G>
Seriously. I know what you mean.