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Technology Stocks : The New Qualcomm - a S&P500 company -- Ignore unavailable to you. Want to Upgrade?

To: engineer who wrote (3889)	12/2/1999 12:44:00 PM
From: James C. Mc Gowan	Read Replies (1) \| Respond to of 13582

Vodophone offers expanded wireless internet access services Looks like not all carriers are slowing down the move towards greater options for wireless internet; even in Europe, looking forward to 3rd generation GSM and video. Message 12152167

To: engineer who wrote (3889)	12/2/1999 5:37:00 PM
From: Boplicity	Read Replies (1) \| Respond to of 13582

IBM, Infineon to Unveil Way to Make Faster Processors Armonk, New York, Dec. 2 (Bloomberg) -- International Business Machines Corp. and Germany's Infineon Technologies Corp. next week will unveil a way to make computer processors that are twice as fast as current chips. IBM, the world's largest computer maker, and Infineon said they invented a process that inserts memory into the body of chips for computers and networking equipment. The process will be detailed in a paper the companies will present next week at the International Electron Device meeting in Washington, D.C. Manufacturers have doubled the number of transistors in a chip space every 18 months, an industry standard known as Moore's Law. Chips that are more dense are faster and smaller and use less power than other processors. Those made with the new process are 25 percent more dense than current processors, IBM said. ''This is a sudden multiplication of Moore's Law,'' said Rick Doherty, research director for the Envisioneering Group Inc., a Seaford, New York-based researcher. With the new memory process, the companies can make chips packed as densely as processors that, under the Moore's Law time line, are expected at the end of next year, he said. ''This is like a gain of nine months to a year,'' Doherty said. Bus Travel Currently, memory is placed on the surface of a computer's main chip or on silicon wafers beside the chip. In this setup, the main chip must go through a pipeline known as a ''bus'' to reach the memory, slowing down the flow of information. ''Processors are basically memory-starved,'' said Bijan Davari, IBM's vice president of semiconductor research and development. The new process reduces the need for information to travel through the bus. Chips made with the process will use less than half the power of current chips, IBM said. The lower power consumption may make the chips appealing to cell-phone makers, Armonk, New York-based IBM said. The process overcomes difficulties that chipmakers are experiencing in making chips more dense to keep up with the pace set by Moore's Law, Doherty said. ''This removes a barrier,'' Davari said. The new process is described in one of 18 papers that IBM will deliver in Washington. Another paper talks about a way to make chips faster with copper wiring and so-called ''silicon-on- insulator'' technology. The advancements , unveiled by IBM in last two years, can be used in chips that are 30 percent to 35 percent faster and use two to three times less power than current processors. ''They're giving a little more detail on what seemed like a boast last year,'' Doherty said. IBM plans to combine silicon-on-insulator, copper wiring and the new memory process to make faster chips next year, Davari said. IBM rose 2 29/64 to 105 7/8 in midday trading.

To: engineer who wrote (3889)	12/2/1999 8:01:00 PM
From: Clarksterh	Read Replies (1) \| Respond to of 13582

Engineer - All CDMA channels are really packet based. I agree - as I said in my original post. the carrier could assign them as they became freed up, not necessarily in a locked step or grouped fashion. Also, if it were packet, then the users can get UP TO 64k bps, which is what I think the service actually is that MOT is offering Again, I agree. The point of my original post was that in IS-95B, compared to HDR, many more resources are locked up when the user isn't using his 'assigned' bandwidth, and thus, although all CDMA standards are more 'packetized' than TDMA, there are probably still per-line charges for IS-95B. It would be interesting to try to list all of the resources which are locked up and why, for instance: In 95B, do each of the channels assigned to the user continue to broadcast at 2 kbps even when the user is sending nothing? Did they increase the number of channels available on the forward link to accomodate lots of very bursty traffic all confined to multiples of 14.4 kbps links? Clark