DSP offerings heat up race to
cellular basestation
By Stephan Ohr
EE Times
(12/06/99, 6:07 a.m. EDT)
ATLANTA — A pair of DSPs to be announced this week show that
the tempo is picking up in the race for design wins in cellular
basestations. The StarCore organization here will announce an RTL
implementation of the SC140 core it unveiled last April. At the same
time, Analog Devices Inc. (Norwood, Mass.) will announce availability
of the ADSP-TS001, the first implementation of its TigerSharc static
superscalar architecture.
The two devices represent an early action in what is shaping up as
a huge battle for slots in next-generation basestations, where a high
Mips rate and low power consumption are required. Analysts say the
offering from StarCore, the joint venture between Motorola
Semiconductor (Austin, Texas) and Lucent Technologies
Microelectronics Group (Allentown, Pa.), may be unique in fitting
both basestations and — thanks to its low power consumption —
handsets as well. The ability to use the same core for both
applications could be a selling point, since it would save OEMs some
programming effort.
Currently, Lucent and Motorola are each selling about $100 million
worth of basestation DSP chips, and competitor Texas Instruments
Inc. (Dallas) is selling about $50 million, said analyst Will Strauss of
Forward Concepts (Tempe, Ariz.). Though TI has reported design
wins for its powerful C6X VLIW processor among basestation
manufacturers, it's too early to predict a winner, said Strauss. Still,
he said, "StarCore's got a good shot at it."
StarCore's strategy, as elaborated by marketing and business
development director Thomas Brooks, is to seed the market with
SC140 test chips and software development boards, starting this
month. These test chips will include 512 kbytes of built-in SRAM.
The parts and development boards will be available from either
Motorola or Lucent. The Motorola device is fabricated in the
company's HIP-C 0.16-micron (L-effective) process, which will
enable it to clock at 300 MHz. The Lucent implementation, which will
use a Lucent COM-2 process, will also be at 0.16 micron. The
StarCore SC140 will be available to licensees as a
register-transfer-level soft core with parameterized library elements,
according to Brooks.
For its part, Analog Devices' ADSP-TS001 implementation of the
250-MHz TigerSharc includes 6 Mbits of SRAM, a fixed- and
floating-point math core capable of up to eight 16-bit
multiply-accumulate operations (MACs) per cycle, four bidirectional
link ports and 128 internal registers. Its 64-bit I/O bus is capable of
transfers at 600 Mbytes/second.
The architecture includes three internal 128-bit-wide buses and
emphasizes a balance among DSP core, memory and I/O bandwidth,
according to Gerry McGuire, ADI's product line manager. The part is
expected to sample with development boards and software tools in
early 2000 (selected customers can get one now), and production
quantities are expected in the first half, he said.
Analog Devices has been coming on like gangbusters in the
general-purpose DSP market, said analyst Strauss. He projected the
company's growth rate in DSPs to be about 30 percent, faster than
the overall market.
With 47 percent of the DSP market, TI continues to dominate. But
its growth has been relatively consistent with that of the overall
market — roughly 25 percent — according to Strauss. Parts like the
SC140 and the TigerSharc could challenge the hegemony of the C6x,
particularly in basestations, he said.
Both the StarCore SC140 and the ADI TigerSharc are geared toward
voice coding, voice-over-Internet Protocol, echo cancellation,
modulation and forward error correction in cellular basestations,
where high performance increases the number of voice channels a
cellular service provider can process.
Both architectures rely on compilers to ease the burden on software
programmers. StarCore and ADI claim their C language compilers
come within 70 percent of the code efficiency that could be
obtained by expert hand coding in assembly language. ADI says its
static superscalar architecture — with visible register locations and
a two-cycle delay for all computations — makes it easier for
programmers to tweak performance after computation. StarCore
says its use of 16-bit instructions results in tighter code density,
which means a smaller memory footprint and fewer clock cycles for
any given sequence of operations — a feature that shows up as
lower power consumption.
The SC140, a very long instruction word architecture with
parallelizable 16-bit instruction blocks and four parallel math
processing units, executes up to 1,200 million MACs/second, or
3,000 RISC Mips at 300 MHz. This makes it one of the most powerful
VLIW processors available. "The SC140, in terms of raw horsepower,
beats anything TI is now shipping," said analyst Strauss.
Impressive performance
Jeff Bier, president of Berkeley Design Technology Inc. (Berkeley,
Calif.), a DSP benchmark compiler and engineering education service,
sees impressive performance gains for these new devices. Bier likes
the TigerSharc's ability to handle multiple data types — 8-, 16- or
32-bit words — with very few instruction cues.
Thus, the device can juggle voice, video and audio data, and TCP/IP
data packets, from the same basestation seat. But because it can
issue multiple instructions and multiple data sets from a single
instruction, the TigerSharc will need a programmer skilled in both
VLIW and SIMD (single-instruction, multiple-data) architectural
styles to extract advertised performance from the TigerSharc, Bier
said.
The StarCore, on the other hand, deserves attention for what Bier
calls its "energy efficiency" — an ability to accomplish more work
with fewer cycles and perhaps a smaller gate count. Power
consumption for the 1.5-volt device is 198 mW at 300 MHz (0.44
mA/MHz). "That's a better Mips-per-watt [ratio] than anything on
the street," confirmed Strauss of Forward Concepts.
Strauss believes that ADI and Intel, which have a DSP partnership,
have quietly agreed to target the cellular handset market. Intel has
also made a concerted grab for the emerging CDMA market in its
recent acquisition of DSP Communications Inc. (Cupertino, Calif.).
Because of the manufacturing volumes associated with cellular
handsets, it would take a manufacturing machine like an Intel or a TI
to make a dent. "There is no way a startup can get into the handset
market," said Strauss. |
