SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Cirruslvr who wrote (82981)12/14/1999 9:43:00 PM
From: Elmer  Read Replies (1) | Respond to of 1572505
 
Re: "Isn't it some kind of SPEC rule that the compiler has to be available or something like that? I think someone mentioned that once. "

I remember something about it having to be available in 3 months. Not sure though.

EP



To: Cirruslvr who wrote (82981)12/15/1999 12:37:00 AM
From: Petz  Read Replies (1) | Respond to of 1572505
 
Cirruslvr and Elmer, re:<speculation on prefetch compiler compatability>

Elmer - RE: "Do you think the code might test the processor ID and only use prefetch if it's a genuine Intel processor?"

Pre-fetch is not just CPU-dependant, its also platform dependant. In other words, the prefetch instructions for an i820/RAMBUS platform which allows SPECint to gain 20% might only add 5% to the performance of a BX/SDRAM platform. BTW, this is why in the real world, prefetch, general enought to optimize all platforms for a specific CPU, will never cause a 20% speedup like it does for SPECint.

Most probably, the Intel compiler must be told which platform and which CPU it should compile for, and then it generates a binary which is optimized for that platform. Although there is some commonality between extended 3DNow and SSE, chances are very high that the code for a Coppermine would crash on the Athlon.

RAMBUS, because of its many simultaneous channels which can be open, requires a very sophisticated compiler for optimized code.

Petz