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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Bilow who wrote (83391)	12/17/1999 1:39:00 PM
From: Tenchusatsu	Respond to of 1583625

Carl, <The second part, I do not understand; I suspect that you intended to write something else. As long as all bursts are ended with a precharge, there isn't any disadvantage (or advantage) to accessing any particular bank with multiple accesses. So no overloading problem...> In a server memory subsystem with auto-precharge, the worst-case scenario is where all concurrent memory accesses in a given memory channel hit the same bank. (The key word is "concurrent," i.e. they need to access the bank at the same time.) In this case, each subsequent memory access will have to wait as the bank precharges. These cause dead cycles to be inserted between each access, and it reduces the efficiency of data bus utilization. But if they all hit different banks, then bandwidth can be efficiently utilized as one bank can be precharged while another one is occupying the data bus. You can see how having a larger number of banks per channel minimizes the worst-case scenario. There's less of a chance that multiple concurrent accesses will compete for the same bank at the same time. But now that I think about it, I guess the advantage of having a large number of banks isn't as great as I make it sound in servers. Proper memory interleaving will ensure that even for SDRAM, the worst-case scenario doesn't occur that often. This is because in a good server chipset, the memory will be arranged in such a way that all of the accesses are spread across multiple channels. Tenchusatsu