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To: Mihaela who wrote (94396)	12/21/1999 1:04:00 AM
From: Paul Engel	Respond to of 186894

Mihaela - Re: "I have read that the initial latency for the first word of memory from RDRAM will be cut in half by putting the Rambus memory controller on-chip on Timna and Willamette arch. Is this true?" Since the TIMNA specs have not yet been released, I couldn't say for sure. Since a memory read does not have to get translated from the CPU to the SEPARATE Memory Controller - and THROUGH the controller - to the RDRAM banks, I would say that the latency should be substantially decreased. However, as I noted, I couldn't tell you if it will be a 50% reduction - since the RDRAM latency (inside the RDRAM chips) is still present. Paul

To: Mihaela who wrote (94396)	12/21/1999 1:11:00 AM
From: Paul Engel	Respond to of 186894

Mihaela - Re: "Do you think Intel could use SDRAM PC133 on Timna with MTH and compete with the Sony PS2 in the "value" segment? " Using an MTH with SDRAM - assuming the MTH is redesigned for PC133 - will help lower memory costs, but this WON'T help a PC compete with a Sony Playstation 2. The Playstation 2 uses at least TWO HUMONGOUS chips that will bring the component costs well above the $300 or $400 mark. But SONY will SELL THE PLAYSTATION 2 at a LOSS. And nobody will complain. Sony gets their main revenue from royalties on the software - and Intel does not have that luxury. Intel has to sell its components at a profit to a PC OEM who has to assemble other componenets to make a system and sell that assembly at a PROFIT. Then, you can toss in Microsoft's OS costs - and MS's profit ! Sony will just give their machine away and make it up in royalties as every kid who buys one - or gets it free - will have Mom and Dad buy 50 game CD's for $49 each, generating about $40/each profit - with a big chunk of that $40 sent back to Tokyo. Paul