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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: Alex Fleming who wrote (35986)	12/22/1999 1:30:00 PM
From: spliff	Respond to of 93625

Intel, memory leaders form Next-Generation DRAM alliance By Jack Robertson Semiconductor Business News (12/22/99, 01:14:18 PM EDT) WASHINGTON--The "Big Five" DRAM makers have joined Intel Corp. in an alliance to develop a next-generation DRAM that will succeed the upcoming Double Data Rate-2 memory architecture in the 2004-2005 timeframe, said industry sources today. The DRAM partners include Samsung Electronics, Hyundai MicroElectronics, Micron Technology, Infineon Technologies, and the new NEC Hitachi Memory Inc. combine. These five companies account for more than 80% of global DRAM sales. When asked about the alliance, an Intel spokesman in Santa Clara, Calif., only said that the firm "is always interested in developing new technologies and advanced semiconductors." He declined to make any specific comment on the "Next-Generation DRAM" alliance. The DRAM companies also declined to comment, but privately some memory chip executives said the alliance had been formed under Intel's leadership. Sources said Intel wants to get memory-maker participation early in the formative stages for a new DRAM architecture, which will succeed DDR-2. DRAMs based on the DDR-2 architecture are expected to hit the market in 2002-2003. Intel tried to dictate the choice of Direct Rambus DRAMs for the current new-generation of memory, but those plans suffered delays, which eventually caused the microprocessor giant to accept competing PC-133 SDRAMs and DDR SDRAMs promoted by chip makers and many computer manufacturers. Intel is still looking at a packet data DRAM architecture for the next-generation memory architecture, according to sources at memory companies. Direct Rambus from Rambus Inc. uses a packet data design, which Intel likes because it offers a lower pin-count package. The PC-133 and DDR SDRAMs, by contrast, use a parallel data bus. This format does not require individual addressing of all memory cells as is the case with a packet data bus. Some sources said all options are still open for the Next-Generation DRAM architecture. Memory officials are apparently happy that Intel has decided to work with other chip makers to develop specifications for future DRAMs. "This should eliminate a lot of the confusion and differences that surrounded Intel's unilateral decision to force Direct Rambus on the market," said one marketing vice president, who asked not to be identified.

To: Alex Fleming who wrote (35986)	12/22/1999 3:21:00 PM
From: Petz	Respond to of 93625

Alex, re:<I doubt it would surprise anyone that current Rambus partners would be renegociating the issue of royalties...there are many ways to slice the pie as long as the pie is big enough.> I'm surprised at your attitude towards this new memory alliance. Don't you think they will be able to avoid between 75% and 100% of the IP rights of RAMBUS. And even if RAMBUS successfully defends their IP rights, if this coalition is collecting the royalties, what % of that do you think they will pass on to RAMBUS? As little as possible, thats how much! And with over 80% of the worlds memory production in their pocket, RAMBUS isn't exactly bargaining from a position of strength. "If you put a well designed rambus controller in a CPU you should easily beat the latency of a chipset + PC133 CL2 SDRAM based system. This is where rambus shines, two 1.6 GB/s rambus channels takes far fewer CPU pins than one 2.0 GB/s DDR channel."- snatched from a search on deja.com DDR SDRAM controllers can be put on chip as well. I would bet that by 2002, the issue of pin count will be a non-issue. If RAMBUS wants to preserve their royalty stream, they had better join the memory coalition that is forming. Petz