To: jim kelley who wrote (36142 ) 1/2/2000 5:26:00 AM From: Bilow Read Replies (2) | Respond to of 93625
Hi jim kelley; Re: "Good one! Try putting 128K of DRAM in a chip and see how much that costs. " The marginal cost of putting an extra 128KB of embedded on a chip is under $1, which isn't terribly expensive. But if you are only putting 128KB, you would probably do better to go with embedded SRAM instead, as the process will be cheaper, even though the die size will be a little larger. IBM has a pretty good embedded DRAM process. We should note that IBM sold their DRAM division last year, but kept their embedded DRAM process for ASICs... IBM is well known for having, pretty much, the best technology, they know what the wave of the future is. Their embedded specifications:1 Mb Core Size 3.44 mm2 Additional 1Mb Increments 1.16 mm2 Embedded DRAM Capacity 1 Mb to 16Mb per core in 1Mb increments Multiple macros per chip for capacity and flexibility (Example: 8 macros provide 128Mb) Access Time (Random) 13.0 nsec Access Time (Page Mode) 6.0 nsec Refresh Rate 0.4 æsec Bus Width 256 bits per macro Bus Transfer Frequency (Page Mode) 150 MHz Bandwidth (Page Mode) 4.8 GB/sec per macro (Example: 19.2 GB/sec for 4 macros) chips.ibm.com It's interesting to check and see what it would cost to put a full 128Mb in embedded on a chip, though this would be pushing the envelope of how much they will allow... A 100mm2 chip costs about $50, in sufficiently high volume, so at 1.16mm2 per 1Mb, you have that 1Mb costs about 58 cents. Thus a full 128Mb, (which is more than would fit, no doubt), would cost about $74. Probably more like $100, cause the embedded DRAM needs more process steps, I think. Of course, the bandwidth available from that much memory would be phenomenal: 4.8GB/sec * 128 = 614GB/sec, about as much as would be provided by the total of all the RDRAM that shipped (to customers, not just to reviewers,) in desktop PCs last year... (G) In any case, that is a lot of bandwidth for the price, though it is more than could be put on a chip. On the other hand, IBM uses 8 macros as an example, and that would have a bandwidth of 38GB/sec, about 10x the bandwidth of the dual RIMM modules on the 840. If you want memory size, it is clear that SDRAM is the way to go, as you can buy DIMMs with far greater memory capacity than RIMMs... Engineering is a matter of trade offs, but embedded is eating away at the bottom end of the market. Embedded memory sizes are increasing much faster than standard memory sizes. The cross-over point is granularity dependent, which is exactly Rambus' niche. And Rambus' interface is so difficult that it requires special cells, not much less difficult than embedded DRAM itself. Certainly embedded is becoming a more and more standard item. The loss of Rambus' design win for the next generation game console at their largest customer for the previous generation of RDRAM, was due partly to embedded, and partly to DDR-II. That is why the RMBS 10-K refers to embedded as a competing technology. -- Carl P.S. In order to compare the size of those embedded DRAM cells with standard issue DRAMs, the following link will assist:Following a pattern that has become the norm in DRAMs, NEC will boost production output mainly by shrinking its die sizes. This month, the company will shrink line widths of its 128-Mbit SDRAMs from 0.22 to 0.2 micron, reducing die area to 77 mm2. For Rambus parts with the same density, it plans to implement a 0.2-micron die shrink this summer, bringing die size below 100 mm2. Next month, NEC will scale down its 64-Mbit devices to 42.7 mm2 using the same process technology. techweb.com Therefore, Rambus memories at 0.2u are about 100mm2/128Mb = 0.78 mm2/Mb SDRAM, is 77mm2/128Mb = 0.60 mm2/Mb. The IBM process is within a factor of two of standard DRAM in size. Of course, engineers integrate two separate components onto the same silicon, even though it increases the die size, quite regularly, because other system savings regularly outweigh the increased silicon cost. One notes that the RDRAM/SDRAM die penalty is (less than) 30 percent. It is this die size penalty which proves that the guys over at Rambus don't know what they are doing. The next generation of RDRAM is supposed to fix the problem, but it should never have happened in the first place. Incompetence.