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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Process Boy who wrote (86092)1/9/2000 12:05:00 AM
From: Jim McMannis  Read Replies (1) | Respond to of 1572171
 
RE:"the Coppermine/PIII is 7 cycles (this is an amazing, commendable, nearly impossible achievement, and it explains 90% of the way why the PIII is able to attain parity with the Athlon)."...

Saw that a while back. Does it make sense to you?

Jim



To: Process Boy who wrote (86092)1/9/2000 1:34:00 AM
From: Petz  Read Replies (1) | Respond to of 1572171
 
PB, I am very impressed with the achievement of CuMine's L2 latency, especially since the cache transistors running at half CPU speed will NOT be the limiting factor in scaling to higher MHz.

I hope AMD will have the same very wide access (256), 1/2 speed, 7-cycle latency features in the T-Bird L2 cache.

Petz


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