SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Process Boy who wrote (87387)1/15/2000 12:16:00 PM
From: Scumbria  Read Replies (1) | Respond to of 1572508
 
PB,

You don't really believe Intel is going to leave it's product designs static, do you Bill?

Having already added a low latency L2, any future improvements will be relatively insignificant. There isn't much left to be done on the P6 core. Increasing the L1 size would help, but I doubt they will do that.

Scumbria



To: Process Boy who wrote (87387)1/15/2000 6:46:00 PM
From: Bill Jackson  Read Replies (2) | Respond to of 1572508
 
PB, Well, I know that by the time AMD gets full speed cache then Intel will have triple speed cache, well can you beat that...triple speed?

I do not expect AMD to be staic and let Intel catch up.
Bill


HomeMailHotSubjectMarksPeopleMarksKeepersSettings
Terms Of UseContact UsCopyright/IP PolicyPrivacy PolicyAbout UsFAQAdvertise on SI
© 2025 Knight Sac Media.  Data provided by Twelve Data, Alpha Vantage, and CityFALCON News