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Technology Stocks : Intel Corporation (INTC) -- Ignore unavailable to you. Want to Upgrade?

To: bhagavathi who wrote (96951)	1/20/2000 6:48:00 PM
From: Gerald Walls	Respond to of 186894

If you are a OS developer you would understand what exceptions are thrown on what conditions, plus what type of flags you would want to set on certain conditions (states of the machine). This information is very crucial in developing reliable OSes & have predictable performance. In the past I've developed firmware which did device-level manipulations, in areas such as real-time IO and EEPROM programming with EDC bits. While not exactly the same thing as OS development it has given me the experience so that I am fully aware of the sort of issues involved. Also, in the fall of 1990 I had a very interesting class where we spent the entire semester going through the source code for the Unix Level Six OS for the ancient PDP-11 computers. Now for the sake of argument let us say intel cpu's set a 12th bit in a PSW (processor status word) if a program tries to divide by a 0. If amd's cpu sets any other bit for this condition, now you have a new requirement from OS to monitor different bits of the PSW for different architecture. This is why AMD (or any other x86-compatible processor manufacturer) goes to great pains to ensure that they meet the register and port specifications published by Intel. If they didn't then the OS would have to be ported to their chip and no one would buy it. AMD may have additional instructions or registers that the OS may either take advantage of for additional performance or may ignore for compatibility reasons. If a chip is claimed to be x86-compatible then it must implement the registers and ports presented by the x86 family.