Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Elmer who wrote (89014)	1/22/2000 6:41:00 PM
From: Process Boy	Respond to of 1572711

Elmer - ref: Bohr and Yang on Al vs. Cu. THANK YOU!!!!! That's pretty much it Milo. PB

To: Elmer who wrote (89014)	1/22/2000 6:48:00 PM
From: milo_morai	Read Replies (2) \| Respond to of 1572711

Thanx Elmer so INTC has "Eschewing copper, Intel chose to stick with aluminum wiring, but adopted a fluorided silicon oxide (SiO2F) material for the inter-level-dielectric. By adding 5.5 percent fluoride to silicon dioxide, the ILD has a k value of 3.55, compared with 4.1 for Intel's previous SiO2-based ILD" and "Rather than shift to copper interconnects and a dual-damascene process, Intel chose to put its energies into figuring out how to create the "tall and skinny" wires that can be spaced far enough apart to avoid capacitive coupling, and yet with enough metal to reduce the resistance that plagues thin wires." So Its my understanding INTC was more comfortable choosing this route as it's something they understand better. eet.com "Copper is a more expensive technology, and the benefits at 0.18-micron line widths are not compelling, Bohr said. The same cost-vs.-performance argument pertains to silicon on insulator (SOI). "I have not seen the data, even from IBM, that shows a performance advantage in going to SOI," said Bohr. There is a paper [from IBM] at this conference that has a 10-ps stage delay with an 80-nm gate. We achieved an 11-ps stage delay with a 130-nm gate today, in a process that is shippable next year."" This is good on one hand for intel and better on the other hand for IBM/MOT/and AMD. IMO Like I said AMD will be 12months ahead on Copper and should have a easy transition from 180nM to 130nM.. Can't recall where I heard some speculations That Fab 30 was already doing some 150nM. Anyone Here recall that? Milo