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Technology Stocks : COM21 (CMTO) -- Ignore unavailable to you. Want to Upgrade?

To: lml who wrote (1641)	1/31/2000 5:38:00 PM
From: Mark Laubach	Read Replies (1) \| Respond to of 2347

Let me just rattle off thoughts to see if they can answer some of your questions. MAC stands for Media Access Control. It is Layer 2 in the ISO networking stack (see Tannenbaum "Computer Networking" for reference) . PHY stands for Physical, and is Layer 1 in the stack. In modern digital communications, the PHY layer has to do a lot of computation. I seem to recall some mention that doing downstream reception of 64 QAM with adaptive equalization to eliminate problems with micro reflections was on the order of magnitude of about 100 million floating point operations per second (MFLOPS). The downstream MAC bit rate that needs to be processed is on the order of 30-40 million bits per second (Mbps). Each downstream packet has one or more circular redundancy checks that need to be performed, these take a lot of cycles. Also, there is always some form of strict timing that is either derived directly from the downstream transmission itself or time stamps that are passed as MAC packets. These are used to precisely control the timing of the upstream PHY. DOCSIS does timing in multiples of 6.25 microsecond intervals in the PHY and the timing system has to have very low jitter. DOCSIS is an asynchronouse upstream packet burst. Com21's asynchronous upstream has a timing resolution to 1/30,000,000 or about 30 nanoseconds used to establish timing then a precise 200 microsecond transmission slot timing clock. If the PHY is synchronous, like the "S" in S-CDMA, then the timing requirements are very much tighter and have more fine grain resolution. Why talk about PHY timing? Basically to give a sense that the time synchronization stability is a big deal and beyond the range of most microprocessors - at least in the price range required for cable modems. Also, the shear computation load of the downstream demodulator takes a lot of computing power. Processing packets in the MAC is more suited to general CPUs, but directly related to the $'s for performance of them. The CPU has to do all the MAC processing at the downstream bit rate, which is very fast. Five years ago, forget it for a 30 Mbps stream. Today, CPU's have gotten fast enough, but the cost is an issue. The industry has found so far that doing ASICs is the only way to get the performance up and the cost down for these critical areas of timing and computation need. There is only one technology that I am aware of that might be suitable for complete software control, which is MicroUnity, but they have some of their own issues and aren't in the market at this time. There is other DSP type technology from TI and others, that might not give as much flexibility, but still give some. I'm not sure what the cost is on these. Then again, someone could pull a rabbit out of the hat. But it's got to be a cost effective rabbit. Mark